JAJU875 July   2020

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 ブロック図
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 TPS62864
      2. 2.3.2 TPS62088
      3. 2.3.3 TLV73318
    4. 2.4 System Design Theory
      1. 2.4.1 Designing Buck Converter Circuit TPS62864
      2. 2.4.2 Designing Buck Converter Circuit TPS62088
      3. 2.4.3 Designing Buck Converter Circuit TLV73318
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Testing and Results
      1. 3.1.1 Test Setup
      2. 3.1.2 Test Results
        1. 3.1.2.1 Startup with no load
        2. 3.1.2.2 Load Transient Rail SoC 0.9V
        3. 3.1.2.3 Load Transient Rail NAND I/O 1.2 V
        4. 3.1.2.4 Load Transient Rail NAND VCC 2.5 V
        5. 3.1.2.5 Output Ripple Rail SoC 0.9 V
        6. 3.1.2.6 Output Ripple Rail NAND I/O 1.2 V
        7. 3.1.2.7 Output Ripple Rail NAND VCC 2.5 V
        8. 3.1.2.8 Output Ripple Rail SOC I/O 1.8 V
        9. 3.1.2.9 Efficiency
  9. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  10. 5Software Files
  11. 6Related Documentation
    1. 6.1 Trademarks
    2. 6.2 Third-Party Products Disclaimer

2.2 Design Considerations

The design uses the adjustable output voltage version of TPS62088 which sets the output voltage of U2 and U3 depending of the value of the resistors R4, R6 and R7, R9 respectively.

The supply of the NAND IO is usually 1.2 V or 1.8 V. By default, U2 is set to output 1.2 V. However, it is also possible to use the IC fixed versions TPS6208812 or TPS6208818 to obtain 1.2 V or 1.8 V respectively. In that case, R4, R6 and C6 should be removed and the FB pin should be connected to the output. The difference in the design is shown in Figure 2-2 and Figure 2-3.

GUID-F547CD2F-D5E9-4764-B0A4-D215CBF9B737-low.gifFigure 2-2 Typical Reference Design of Adjustable Output
GUID-8CB7D271-16DA-43F5-8AD5-A8C761C1033E-low.gifFigure 2-3 Typical Reference Design of Fixed Output