JAJU878 November 2022 ADS117L11 , ADS127L11
The excitation current circuit and booster stage are not powered for the noise floor and dynamic range tests.
Begin by setting the ADC input MUX to offset test mode.
The ADC intrinsic voltage noise sigma is 7.7 μV, and offset of about 50 μV which is in line with the values in the ADS127L11 400-kSPS, Wide-Bandwidth, 24-Bit, Delta-Sigma ADC data sheet.
Next, short the front-end input (J8A, 2-3 = short).
The full front-end voltage noise is around 19.8 μV, which is equivalent to 103 dB of Dynamic Range. The frequency plot in Figure 4-11 shows a clean spectrum with the highest tone at 94 dBFS.
The time-domain plot (see Figure 4-12) verifies that there are no visible tones. The mean value of the channels are well below 0.5 mV which is the estimated offset of the whole channel including the offsets of OPA2320 (with gain of 4) and THS4551 (with gain of 2), and the ADS127L11 offset.