JAJU885B April   2017  – January 2023

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Overview
    1. 1.1 System Description
    2. 1.2 Key System Specifications
    3. 1.3 Highlighted Products
      1. 1.3.1 TPS82130
    4. 1.4 Design Considerations
      1. 1.4.1 Inverting Buck-Boost Topology Concept
      2. 1.4.2 VIN and VOUT Range
      3. 1.4.3 Maximum Output Current
        1. 1.4.3.1 Thermal Limits
        2. 1.4.3.2 Stability Limits and Output Capacitor Selection
      4. 1.4.4 Design Precautions
      5. 1.4.5 Enable Pin Configuration
      6. 1.4.6 Power Good Pin Configuration
      7. 1.4.7 Discharging Output Voltage
      8. 1.4.8 Input Capacitor Selection
  7. 2Getting Started Hardware
  8. 3Testing and Results
    1. 3.1 Test Results
  9. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 Layout Prints
    4. 4.4 Gerber Files
    5. 4.5 Assembly Drawings
  10. 5Related Documentation
  11. 6Trademarks
  12. 7Revision History

1.4.7 Discharging Output Voltage

If the TPS82130 device is disabled in a light-load or no-load condition, the PG pin can accelerate return of VOUT to 0 V by providing an additional discharge path. When the IC has been disabled through the EN pin, the PG pin is connected to the device ground (–VOUT) through an internal MOSFET. Placing a resistor between ground and the PG pin creates a discharge path to ground.

The added resistor must be sized to limit the current into the PG pin to a safe level, which the TPS82130 datasheet specifies as 10 mA maximum. A 200-Ω PG resistor has been chosen for this –1.8-V output voltage.