SBAA499A July 2021 – April 2022 PCM3120-Q1 , PCM5120-Q1 , PCM6120-Q1 , TLV320ADC3120 , TLV320ADC5120 , TLV320ADC6120
The TLV320ADCx120 and PCMx120-Q1 family supports three different modes for common-mode tolerance that should be selected based on the maximum expected common-mode variation. Since wider common-mode tolerance does degrade other performance parameters, it is recommended to select the lowest tolerance mode possible.
P0_R58_D[7:6] : CH1_INP_CM_TOL_CFG[1:0] | CHANNEL 1 INPUT COMMON-MODE TOLERANCE |
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00 (default) | Channel 1 input common-mode tolerance of: AC-coupled input = 100 mVPP, DC-coupled input = 2.82 VPP. |
01 | Channel 1 input common-mode tolerance of: AC/DC-coupled input = 1 VPP. |
10 (high CMRR mode) | Channel 1 input common-mode tolerance of: AC/DC-coupled input = 0-AVDD (supported only with an input impedance of 10 kΩ and 20 kΩ). For input impedance of 2.5 kΩ, the input common-mode tolerance is 0.4 V to 2.6 V. |
11 | Reserved (do not use this setting) |
It is important to keep in mind that in all modes, the full-scale range of the device is still 2-Vrms. This is especially important for large common-mode signals as they will limit the effective input range. Mode 2, for example, can support a common-mode range of 0-V to AVDD, but there would be no room left for a differential signal to be applied to the input pins at either of these extremes. The PGA gain can be used to amplify the differential signal as needed but the attenuated common-mode signal will be amplified as well.