SBAA576A
may 2023 – june 2023
ADS54J60
1
Abstract
Trademarks
1
Introduction
2
Interleaving Architecture
3
DC Offset Correction
3.1
DC Offset Correction Architecture
3.1.1
Default Configuration
3.1.2
Bypassing the DC Offset Correction
3.2
Freezing the DC Offset Correction
3.3
Effect of Environmental Temperature Fluctuations
3.4
Effect of Input Frequency on Interleaving Spur
4
External Offset Correction
5
Configuring External DC Offset Correction (Channel A)
5.1
Device Default Configuration
5.2
Baseline HSDC Pro Capture
5.3
Freezing the Interleaving Engine and DC Offset Values
5.4
Reading the Frozen DC Offset Values
5.5
Loading the DC Offset Values
5.6
Confirm HSDC Pro Capture
6
Summary
7
References
8
Revision History
8
Revision History
Changes from Revision * (May 2023) to Revision A (June 2023)
Updated the numbering format for tables, figures, and cross-references throughout the document
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Changed
ADC54JXX GUI
to
ADS54JXX GUI
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