SBAA621 March 2024 AFE20408

3 Output Configurations

The flexibility of the switching mechanism allows the user to configure the AFE20408 in a variety of ways. For simplicity, this document refers to DACA0, DACA1, and OUTA0. All other DAC-OUT-DAC groups can be configured in the same way.

The switches can be toggled with software bits or hardware pins. By default, the switches are configured to work with software. Each DAC output has an associated DRVEN software bit that toggles the output switch or DAC buffer, depending on the DAC. Figure 3-1 shows how the OUTA0 switches are configured in the AFE20408.

Figure 3-1 AFE20408 OUTA0 Switches

The OUTA0 pin switches between the DACA0 voltage and the CLAMP voltage with the DRVEN_DACA0 bit. When DRVEN_DACA0 is 0, OUTA0 is set to the CLAMP voltage. When DRVEN_DACA0 is 1, OUTA0 is set to DACA0. The CLAMP voltage is set to either VSSA or DACA1 through the CLAMP_SEL_OUTA0 bit. The DRVEN_DACA1 bit controls the DACA1 buffer. A digital 1 turns the DACA1 buffer on, and 0 turns the DACA1 buffer off.

The four sets of DAC-OUT-DAC groups can be configured independently, allowing for a multitude of configurations to meet the user's requirements. Table 3-1 shows a few of the possible configurations with the DACA0-OUTA0-DACA1 group using the software bits.

Table 3-1 AFE20408 Output Configurations

CLAMP_SEL_OUTA0 CLAMP Setting	DRVEN_DACA0 = 0 OUTA0 Output	DRVEN_DACA0 = 1 OUTA0 Output	DRVEN_DACA1 = 0 DACA1 Output	DRVEN_DACA1 = 1 DACA1 Output
VSSA	VSSA	DACA0	VSSA	DACA1
DACA1	DACA1	DACA0	Ignored	Ignored

CLAMP_SEL_OUTA0

CLAMP Setting

DRVEN_DACA0 = 0

OUTA0 Output

DRVEN_DACA0 = 1

OUTA0 Output

DRVEN_DACA1 = 0

DACA1 Output

DRVEN_DACA1 = 1

DACA1 Output

VSSA

DACA0

VSSA

DACA1

DACA0

Ignored

There are three possible hardware pins: DRVEN0, DRVEN1, and DRVEN2. DRVEN2 is one of the selectable options of the FLEXIO pin. Each of the switches can be enabled by the hardware pins instead of software.

Figure 3-2 shows a switch configuration where DACA1 is set as the clamp voltage. The OUTA0 switch toggles the OUTA0 output voltage between on voltage DACA0 and the PA pinch-off voltage DACA1. This configuration allows for a precise gate on and off voltage to minimize wasted power and switching speed. The large capacitors on the DAC outputs allow for fast output switching, as seen in Figure 3-3. In this plot, the switch is being driven by a 1MHz signal on the DRVEN0 pin.

Table 3-2 AFE20408 Dual DAC Configuration

CLAMP Setting	OUTA0 OFF Output	OUTA0 ON Output
DACA1	DACA1	DACA0

Figure 3-2 Dual DAC Configuration

Figure 3-3 Dual DAC Switching Plot

Figure 3-4 shows a switch configuration where the clamp is set to VSSA. This configuration has the OUTA0 pin switch between on voltage DACA0 and off voltage VSSA. This configuration does not give the same precise pinch-off voltage as the dual-DAC configuration, but allows DACA1 to be used for additional gate biasing. The large capacitor on DACA0 allows for fast output switching, as seen in Figure 3-5. In this plot, the switch is being driven by a 1MHz signal on DRVEN0.

Table 3-3 AFE20408 Single DAC Configuration

CLAMP Setting	OUTA0 OFF Output	OUTA0 ON Output
VSS	VSS	DACA0

Figure 3-4 Single DAC Configuration

Figure 3-5 Single DAC Switching Plot

The DACA1 buffer can be configured to toggle on and off with the DRVEN pins as well. DACA1 switching is much slower, as seen in Figure 3-6. In this plot, the switch is being driven by a 80kHz signal on DRVEN0. This slow switching is due to the capacitor on DACA1 having to charge each time the switch turns on. Because of this charge time, a small capacitor is recommended for the DACA1 output.

If DACA1 is set as the CLAMP, DACA1 ignores the OFF condition and stays high.

Table 3-4 AFE20408 DACA1 Buffer Configuration

CLAMP Setting	DACA1 OFF Output	DACA1 ON Output
VSS	VSS	DACA1
DACA1	Ignored	DACA1

Figure 3-6 DACA1 DRVEN Switching Plot