SBAK019A July   2024  – November 2024 ADC3683-SP

 

  1.   1
  2.   2
  3.   Trademarks
  4. Introduction
  5. Single-Event Effects
  6. Device and Test Board Information
  7. Irradiation Facility and Setup
  8. Depth, Range, and LETEFF Calculation
  9. Test Setup and Procedures
  10. Destructive Single-Event Effects (DSEE)
    1. 7.1 Single-Event Latch-Up (SEL) Results
  11. Single-Event Transients (SET)
    1. 8.1 Single Event Transients
  12. Event Rate Calculations
  13. 10Summary
  14. 11References
  15. 12Revision History

Introduction

The ADC3683-SP is a low noise, ultra-low power 18- bit 65 MSPS high-speed dual channel ADC. Designed for lowest noise performance, the device delivers a noise spectral density of -160 dBFS/Hz combined with excellent linearity and dynamic range. The ADC3683-SP offers DC precision together with IF sampling support, making the device applicable for a wide range of applications. High-speed control loops benefit from the short latency as low as only one clock cycle. The ADC consumes only 94mW/ch at 65Msps and the power consumption scales well with lower sampling rates.

The device uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The device is a pin-to-pin compatible with the 14-bit, 125MSPS ADC3664- SP. The ADC3683-SP comes in a 64-pin HBP CFP package (10.9mm × 10.9mm) and supports a temperature range from -55 to +105°C.

Table 1-1 Overview Information
Description (1)Device Information
Generic Part NumberADC3683-SP
Orderable Part Number5962F2320401VXC
Device FunctionLow-Noise Dual 18-Bit 65MSPS ADC
Device Package64-pin HBP CFP
(10.9mm × 10.9mm)
TechnologyTI C021 65nm CMOS
Exposure FacilityRadiation Effects Facility Cyclotron Institute, Texas A&M University (15MeV / Nucleon)
Heavy Ion Fluence per runUp to 1 × 107 ions/cm2
Irradiation Temperature25°C (for SET testing) and 125°C (for SEL testing)
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