8.6.7 GPIO_CFG Register (Address = 0x7) [reset = 0x0]
GPIO_CFG is shown in Figure 44 and described in Table 21.
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Figure 44. GPIO_CFG Register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
GPIO_CFG[7:0] |
R/W-0b |
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Table 21. GPIO_CFG Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
7-0 |
GPIO_CFG[7:0] |
R/W |
0b |
Configure GPIO[7:0] as either digital inputs or digital outputs.
0b = GPIO is configured as digital input.
1b = GPIO is configured as digital output.
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