SBAU126E may   2007  – june 2023 ADS1158 , ADS1258

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1ADS1258EVM Overview
    1. 1.1 ADS1258EVM Kit
    2. 1.2 ADS1258EVM
  5. 2Getting Started With the ADS1258EVM
  6. 3Analog Interface
    1. 3.1 Analog Input Options
    2. 3.2 ADC Connections and Decoupling
    3. 3.3 Configurable Multiplexer Loop
      1. 3.3.1 Measuring Single-Ended Inputs Using a Pseudo-Differential Configuration
    4. 3.4 Clocking
    5. 3.5 Voltage Reference
  7. 4Digital Interface
    1. 4.1 GPIO
  8. 5Power Supplies
  9. 6Software Installation
  10. 7EVM Operation and GUI
    1. 7.1 Connecting the Hardware
    2. 7.2 EVM GUI Global Settings for ADC Control
    3. 7.3 Time-Domain Display
    4. 7.4 Frequency-Domain Display
    5. 7.5 Histogram Display
  11. 8Bill of Materials, Layout, and Schematics
    1. 8.1 Bill of Materials
    2. 8.2 EVM PCB Layout
    3. 8.3 Schematics
  12. 9Revision History

1.2 ADS1258EVM

The ADS1258EVM includes the following features and configuration options:

  • An OPA2320 precision amplifier buffer between the multiplexer output and ADC input, or bypass external circuitry
  • Low-noise, low-drift, 2.5-V REF6025 as the default reference source, or use an external reference source
  • A 16-MHz clock signal provided by the PHI controller, or use an external clock source
  • Eight general-purpose input-output (GPIO) pins brought out to a dedicated header
  • Ultra-low noise TPS7A4700 low-dropout (LDO) linear regulator supplies 5-V ADC analog voltage (AVDD), or use an external voltage supply
  • 3.3-V ADC digital voltage (DVDD) supplied by PHI controller, or use external voltage supply
  • Test points for power, GND, reference, and all digital signals to and from the PHI controller