SBAU206B april   2015  – may 2023 ADS1262 , ADS1263

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1EVM Overview
    1. 1.1 ADS1263EVM Kit
    2. 1.2 ADS1263EVM Board
  5. 2Getting Started With the ADS1263EVM
  6. 3Analog Interface
    1. 3.1 Analog Input Options
      1. 3.1.1 ADS1263 Integrated Input Functions
        1. 3.1.1.1 ADC Inputs
        2. 3.1.1.2 IDAC Output
        3. 3.1.1.3 VBIAS Output
        4. 3.1.1.4 External Reference
        5. 3.1.1.5 Test DAC Output
        6. 3.1.1.6 GPIO
      2. 3.1.2 Analog Sensor Connections
        1. 3.1.2.1 Connecting a Thermocouple to J4 on the ADS1263EVM
        2. 3.1.2.2 Connecting a Thermistor to J3 on the ADS1263EVM
        3. 3.1.2.3 Using Thermistor RT1 for Thermocouple Cold-Junction Compensation
        4. 3.1.2.4 Connecting an RTD to J3 on the ADS1263EVM
          1. 3.1.2.4.1 Connecting a 2-Wire RTD
          2. 3.1.2.4.2 Connecting a 3-Wire RTD
          3. 3.1.2.4.3 Connecting a 4-Wire RTD
    2. 3.2 ADC Connections and Decoupling
    3. 3.3 Clocking
    4. 3.4 Voltage Reference
  7. 4Digital Interface
  8. 5Power Supplies
  9. 6Software Installation
  10. 7EVM Operation and GUI
    1. 7.1 Connecting the EVM Hardware
    2. 7.2 EVM GUI Global Settings for ADC Control
    3. 7.3 Time Domain Display
    4. 7.4 Frequency Domain Display
    5. 7.5 Histogram Display
    6. 7.6 Using the GUI to Control ADC2
  11. 8Bill of Materials, PCB Layout, and Schematics
    1. 8.1 Bill of Materials
    2. 8.2 PCB Layout
    3. 8.3 Schematics
  12. 9Revision History

5 Power Supplies

The default ADC power-supply voltages (DVDD and AVDD) are generated by the PHI controller using power from the USB. The PHI provides 3.3-V and 5.5-V power rails. The 3.3-V power rail directly supplies the ADC DVDD voltage. The 5.5-V power rail is supplied to the input of the TPS7A4700, a low-noise, configurable-output LDO, to supply AVDD. The LDO output voltage depends on the internal reference voltage (VLDO_REF) of 1.4 V and the pin connections. Grounding any LDO pin between pin 4 through pin 12 adds that pin voltage to VLDO_REF and increases the LDO output voltage, LDOVOUT. Figure 5-1 shows that the ADS1263EVM grounds pin 6 and pin 10 (3P2V and 0P4V, respectively) to set LDOVOUT to 5 V.

GUID-20221111-SS0I-M7MP-GN4B-B3H5VCSNJP4K-low.svgFigure 5-1 ADS1263EVM LDO Circuit and External Power Source Connections

Figure 5-1 also shows that the 5V_LDO output is used for the AVDD connections across the EVM. Additionally, the user can measure the AVDD current by connecting an ammeter between pins 1 and 2 of JP1 or the DVDD current by connecting an ammeter between pins 1 and 2 of JP3.

External power sources can also be provided for each supply voltage:

  • LDO: Remove the shunt on JP2 and connect external power to JP2:2
  • AVDD: Remove the shunt on JP3 and connect external power to JP3:2
  • DVDD: Remove the shunt on JP1 and connect external power to JP1:2

When using either internal or external power supplies, LEDs D2 and D3 indicate if power is connected to AVDD and DVDD, respectively. These LEDs do not necessarily indicate if AVDD is 5 V or if DVDD is 3.3 V. Check the AVDD voltage using terminal JP6:1 and check the DVDD voltage using test point TP9. Figure 5-2 shows the portion of the schematic that includes the AVDD and DVDD LEDs.

GUID-20221111-SS0I-QCPG-RHCG-98RWPZXC7QZV-low.svgFigure 5-2 ADS1263EVM AVDD and DVDD Indicator LEDs and Shunts