SBAU269C October   2016  – August 2021 ADS8900B

 

  1.   Trademarks
  2. 1EVM Overview
    1. 1.1 ADS8900EVM-PDK Kit Features
    2. 1.2 ADS8900EVM Features
  3. 2Analog Interface
    1. 2.1 ADS8900B Connections and Decoupling
    2. 2.2 ADC Amplifier Input Drive
    3. 2.3 Voltage Reference and VCM Scaling
  4. 3Digital Interface
    1. 3.1 multiSPI™ for ADC Digital I/O
    2. 3.2 I2C Bus for Onboard EEPROM
  5. 4Power Supplies
    1. 4.1 Positive Supply and Test Points
    2. 4.2 Negative Supply
  6. 5ADS8900EVM-PDK Initial Setup
    1. 5.1 Software Installation
    2. 5.2 Default Jumper Settings for Differential Inputs
    3. 5.3 Default Jumpers for Bipolar, Single-Ended Inputs
    4. 5.4 Default Jumpers for Unipolar, Single-Ended Inputs
    5. 5.5 External Source Requirements for ADS8900 Evaluation
  7. 6ADS8900EVM-PDK Operation
    1. 6.1 EVM GUI Global Settings for ADC Control
    2. 6.2 Register Map Configuration Tool
    3. 6.3 Time Domain Display Tool
    4. 6.4 Spectral Analysis Tool
    5. 6.5 Histogram Tool
    6. 6.6 Linearity Analysis Tool
    7. 6.7 ADS8900BEVM Support for ADS8910B and ADS8920B Devices
  8. 7Bill of Materials, PCB Layout, and Schematics
    1. 7.1 Bill of Materials (BOM)
    2. 7.2 PCB Layout
    3. 7.3 Schematics
  9. 8Revision History

4.1 Positive Supply and Test Points

The analog supply of the ADC (AVDD = 5.3 V) is powered by the TPS7A4700RGWR (U5) low-dropout regulator (LDO). The input to this LDO is the regulated 5.5-V supply from the PHI. This LDO can be programed to different voltages by soldering or desoldering resistors R42 to R48.

A test point for each power supply is provided. Furthermore, a light-emitting diode (LED) is used to indicate when the 5.5-V supply from the PHI turns on. This power turns on shortly after the software is booted. The EVM is not powered until the software is started, so TI does not recommend connecting the external signal source until the EVM is powered. Figure 4-1 shows the positive supply and test points for the TPS7A4700RGWR.

GUID-20201202-CA0I-TWR4-VTLR-2FK266FRV88X-low.gif Figure 4-1 Positive Supply and Test Points