SBAU407 april   2023 ADS8354

 

  1.   Abstract
  2.   Trademarks
  3. 1Overview
    1. 1.1 ADS8354EVM-PDK Features
    2. 1.2 ADS8354EVM Features
    3. 1.3 Related Documentation From Texas Instruments
  4. 2Analog Interface
    1. 2.1 Connectors for Analog Inputs
    2. 2.2 ADC Input Signal Driver
      1. 2.2.1 Input Signal Path
  5. 3Digital Interfaces
    1. 3.1 SPI for the ADC Digital I/O
  6. 4Power Supplies
    1. 4.1 ADC Input Driver Configuration
    2. 4.2 ADC Voltage Reference Configuration
  7. 5ADS8354EVM-PDK Initial Setup
    1. 5.1 Default Jumper Settings
    2. 5.2 EVM Graphical User Interface Software Installation
  8. 6ADS8354EVM-PDK Operation
    1. 6.1 EVM GUI Global Settings for ADC Control
    2. 6.2 Time Domain Display Tool
    3. 6.3 Spectral Analysis Tool
    4. 6.4 Histogram Analysis Tool
  9. 7Bill of Materials, Printed-Circuit Board Layout, and Schematics
    1. 7.1 Bill of Materials
    2. 7.2 PCB Layout
    3. 7.3 Schematics

2.2.1 Input Signal Path

Figure 3-3 shows the signal path for the analog inputs applied to the ADS8354EVM. Separate THS4561 amplifiers are used with a gain of 1 V/V configuration to drive the individual analog inputs (AINP and AINM) of each ADC. The OPA320 amplifier circuits help drive the common-mode voltage (VOCM) of the THS4561 amplifiers. An RC filter, with values of Rfilt = 13 Ω, differential Cfilt = 820 pF, and common-mode Cfilt = 10 pF, was selected to achieve a SINAD greater than 88 dB and a THD less than –97 dB for a 2-kHz sine-wave input at full throughput of the ADS8354 of 700 kSPS.

GUID-20230302-SS0I-S8QX-NWDR-904MLDSMX2Q8-low.svgFigure 2-1 ADS8354EVM Analog Input Path

As shown in Figure 2-2, the ADS8354EVM offers two options to provide the output common-mode voltage (VOCM) of the THS4561 amplifiers. By default, JP7 and JP8 are left open and JP5 and JP6 are installed. This configuration selects the ADS8354 internal reference voltage (REFIO_A and REFIO_B) and divides the output by 2 to use REFIO_y / 2 as VOCM (y = A or B), which is required for the default input range of ±VREF. When using the 2xVREF input range, uninstall the jumpers on JP5 and JP6 such that VOCM = REFIO_y.

Alternatively, the REF6025 (U1) can be used in place of the REFIO_A, REFIO_B voltage to serve as the ADC reference and to set the VOCM voltage. Disable the internal reference voltage on the ADS8354 by setting the REF_SEL bit in the CFG register to 0b (external reference) and install jumpers on JP7 and JP8.

GUID-20230331-SS0I-XQ90-C7JC-LSVKZTHD1WPZ-low.svgFigure 2-2 ADS8354EVM Common-Mode Voltage Buffer Circuit