SBAU411 February   2023 ADS127L21

 

  1.   Abstract
  2.   Trademarks
  3. 1EVM Overview
    1. 1.1 ADS127L21 EVM Kit
    2. 1.2 ADS127L21EVM Board
    3. 1.3 ADS127L21EVM-PDK-GUI Unsupported Features
    4. 1.4 Related Documentation
  4. 2Analog Interface
    1. 2.1 EVM Analog Input Options
    2. 2.2 ADC Connections and Decoupling
    3. 2.3 ADC Input Drive Amplifiers
    4. 2.4 VCOM Buffer
    5. 2.5 Onboard Voltage Reference
    6. 2.6 External Voltage Reference
    7. 2.7 Clock Tree
  5. 3Digital Interface
    1. 3.1 Serial Interface
    2. 3.2 I2C bus for Onboard EEPROM
  6. 4Power Supplies
    1. 4.1 Power Connection and Configuration
    2. 4.2 Low Dropout Regulator (LDO)
  7. 5ADS127L21 EVM Software Installation
  8. 6EVM Operation
    1. 6.1 Connecting the Hardware
    2. 6.2 Optional EVM Connections
    3. 6.3 EVM GUI Global Settings for ADC Control
    4. 6.4 Time Domain Display
    5. 6.5 Frequency Domain Display
    6. 6.6 Histogram Display
    7. 6.7 Digital Filter Configuration
    8. 6.8 Digital Filter Response
  9. 7Bill of Materials, Schematics, and Layout
    1. 7.1 Bill of Materials
    2. 7.2 Schematics
    3. 7.3 Board Layout

2.2 ADC Connections and Decoupling

The circuit shown in #GUID-27DF533E-C900-4684-9A74-C8AAA5177144 shows all connections to the ADS127L21 data converter (U3). Each power-supply connection has a 1-μF and 100-nF decoupling capacitor. Make sure these capacitors are physically close to the device and have a good connection to the GND plane. The supply connections also have a series 0.1-Ω resistor. The purpose of this component is to facilitate current measurement for the ADC. Also, each digital input has a 10-Ω series resistor. These resistors smooth the edges of the digital signals to provide minimal overshoot and ringing. Although not strictly required, these components can be included in the final design to improve digital signal integrity.

Figure 2-1 ADS127L21 Connections and Decoupling