SBAU436A January   2024  – February 2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 EVM Analog Input Options
      1. 2.1.1 Differential SMA Inputs
      2. 2.1.2 Single-Ended SMA Inputs
      3. 2.1.3 Differential Input Pins
    2. 2.2 Power Supplies
    3. 2.3 ADC Connections and Decoupling
    4. 2.4 ADC Input Amplifiers
    5. 2.5 VCOM Buffer
    6. 2.6 Voltage Reference
    7. 2.7 Clock Tree
    8. 2.8 Digital Interfaces
  9. 3Software
    1. 3.1 ADS1278EVM Software Installation
  10. 4Implementation Results
    1. 4.1 Hardware Connections
    2. 4.2 Optional EVM Configuration
    3. 4.3 GUI Settings for ADC Control
    4. 4.4 Time Domain Display
    5. 4.5 Frequency Domain Display
    6. 4.6 Histogram Display
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7References
  14. 8Revision History

2.2 Power Supplies

The ADS1278 EVM requires a 6V input through the J10 terminal block and typically draws less than 500mA of current. Three low-noise TPS7A4700 low dropout (LDO) voltage regulators (U9-U11) provide the three voltage rails used by the ADS1278 and the external circuitry. By default, AVDD is configured for 5V, IOVDD is configured for 3.3V, and DVDD is configured for 1.8V. DVDD can be configured to 2.1V for up to 37MHz operation in high-speed mode by installing zero-ohm resistors at locations R69 and R70.

Each voltage rail also features an indicator LED and a test point for convenient verification of power supply functionality.

GUID-20231113-SS0I-M5F1-GCVR-KX91S22VMZKC-low.svgFigure 2-3 Power Supply Circuitry