SBAU436A January   2024  – February 2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 EVM Analog Input Options
      1. 2.1.1 Differential SMA Inputs
      2. 2.1.2 Single-Ended SMA Inputs
      3. 2.1.3 Differential Input Pins
    2. 2.2 Power Supplies
    3. 2.3 ADC Connections and Decoupling
    4. 2.4 ADC Input Amplifiers
    5. 2.5 VCOM Buffer
    6. 2.6 Voltage Reference
    7. 2.7 Clock Tree
    8. 2.8 Digital Interfaces
  9. 3Software
    1. 3.1 ADS1278EVM Software Installation
  10. 4Implementation Results
    1. 4.1 Hardware Connections
    2. 4.2 Optional EVM Configuration
    3. 4.3 GUI Settings for ADC Control
    4. 4.4 Time Domain Display
    5. 4.5 Frequency Domain Display
    6. 4.6 Histogram Display
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7References
  14. 8Revision History

2.8 Digital Interfaces

As noted in Section 1.1, the EVM interfaces with the PHI and communicates with the computer over the USB. The PHI communicates with two devices on the EVM: the ADS1278 (over SPI or frame-sync) and the EEPROM (over I2C). The EEPROM comes preprogrammed with the information required to configure and initialize the ADS1278 platform. When the hardware is initialized, the EEPROM is no longer used. The ADS1278 uses SPI serial communication in mode 1 (CPOL = 0, CPHA = 1) or frame-sync mode. Header J6, shown in Figure 3-9, provides test points to measure the digital signals. The configuration inputs, which are configurable by the PHI interface by default but can also be configured by placing jumpers on J3 and J4, are also shown in Figure 3-9.

GUID-20231113-SS0I-T221-W726-CNC5PQCQBBWB-low.svgFigure 2-9 Digital Interface Connections