SBAU436A January   2024  – February 2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 EVM Analog Input Options
      1. 2.1.1 Differential SMA Inputs
      2. 2.1.2 Single-Ended SMA Inputs
      3. 2.1.3 Differential Input Pins
    2. 2.2 Power Supplies
    3. 2.3 ADC Connections and Decoupling
    4. 2.4 ADC Input Amplifiers
    5. 2.5 VCOM Buffer
    6. 2.6 Voltage Reference
    7. 2.7 Clock Tree
    8. 2.8 Digital Interfaces
  9. 3Software
    1. 3.1 ADS1278EVM Software Installation
  10. 4Implementation Results
    1. 4.1 Hardware Connections
    2. 4.2 Optional EVM Configuration
    3. 4.3 GUI Settings for ADC Control
    4. 4.4 Time Domain Display
    5. 4.5 Frequency Domain Display
    6. 4.6 Histogram Display
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7References
  14. 8Revision History

1.3 Specification

The ADS1278EVM-PDK requires an external 6V power source to power three ultra-low noise TPS7A4700 low-dropout (LDO) linear regulators that supply the ADS1278 voltage rails. The EVM supports the use of an external clock, as well as setting the MODE, FORMAT, and CLKDIV pins with jumpers.

The EVM can also be configured by populating and depopulating the appropriate pin headers and zero-ohm jumper resistors to manually measure or set the Vcm, Vref, and shutdown pins of the ADS1278 EVM.

Control and monitoring of the communications between the EVM and the PHI controller board is provided using the pin header test points. Likewise, monitoring the analog input signals and power supply rails is supported using the test points built into the board.

The operating conditions listed in Table 2-1 must be observed when using the ADS1278EVM.

Table 1-1 Operating Conditions
PARAMETERCONDITIONSVALUE
Temperature

Recommended operating free-air temperature range, TA

15°C to 35°C

Power supply input range

Voltage input range for J10 (+6V supply)

+5.5V to +6.5V

Supply current range |IS|

300mA ≤ |IS| ≤ 500mA

Analog input voltage rangeAbsolute input voltage versus GND for CH1-CH8 inputs0V to +5V
Maximum VCOM currentRecommended max current from J1 (optional VCOM output pins)30mA
EXT clock frequencyHigh-speed mode0.1 to 37MHz
Other modes0.1 to 27MHz
Digital logic input levelsRecommended digital voltage high level (VIH)

0.7 IOVDD ≤ VIH ≤ IOVDD

Recommended digital voltage low level (VIL)

0.3 IOVDD ≥ VIL ≥ GND

ADS1278 AVDD Voltage range

Voltage supplied to ADS1278 AVDD pins from onboard regulator or external source

+4.75V to +5.25V

ADS1278 IOVDD voltage rangeVoltage supplied to ADS1278 IOVDD pins from onboard regulator or external source

+1.65V to +3.6V

ADS1278 DVDD voltage rangeVoltage supplied to ADS1278 DVDD pin from onboard regulator or external source

+1.65V to +1.95V

ADS1278 VREF voltage range

Voltage supplied to J2 (optional VREF input)

+0.5V to +3.1V