SBOA384 September   2020 TLV9062-Q1 , TLV9064-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOIC (8) Package
    2. 2.2 VSSOP (8) Package
    3. 2.3 SOIC (14) Package
    4. 2.4 TSSOP (14) Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOIC (8) and VSSOP (8) Packages
    2. 4.2 TSSOP (14) and SOIC (14) Packages

1 Overview

This document contains information for TLV9062-Q1 (SOIC (8) and VSSOP (8) packages) and TLV9064-Q1 (TSSOP (14) and SOIC (14) packages) to aid in a functional safety system design. Information provided are:

  • Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (Pin FMA)

Figure 1-1 shows the device functional block diagram for reference.

GUID-DAF72675-5B07-426C-8811-4BFCBFBAE57F-low.gifFigure 1-1 Functional Block Diagram

TLV9062-Q1 and TLV9064-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.