SBOA384 September   2020 TLV9062-Q1 , TLV9064-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOIC (8) Package
    2. 2.2 VSSOP (8) Package
    3. 2.3 SOIC (14) Package
    4. 2.4 TSSOP (14) Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOIC (8) and VSSOP (8) Packages
    2. 4.2 TSSOP (14) and SOIC (14) Packages

4.1 SOIC (8) and VSSOP (8) Packages

Figure 4-1 shows the TLV9062-Q1 pin diagram for the SOIC (8) and VSSOP (8) packages. For a detailed description of the device pins please refer to the 'Pin Configuration and Functions' section in the TLV9062-Q1 data sheet.

Figure 4-1 Pin Diagram (SOIC (8) and VSSOP (8) Packages)
Table 4-2 Pin FMA for Device Pins Short-Circuited to (V-) Pin
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
OUT11May cause overheating.B
IN1-2Input at V- is valid input, however, desired application result is unlikely.C
IN1+3Input at V- is valid input, however, desired application result is unlikely.C
(V-)4Normal operation.D
IN2+5Input at V- is valid input, however, desired application result is unlikely.C
IN2-6Input at V- is valid input, however, desired application result is unlikely.C
OUT27May cause overheating due to output short circuit current.B
(V+)8Diodes from input to V+ may turn due to input signal and cause EOS.B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
OUT11Output can't be used by application.C
IN1-2Floating input, circuit will likely not function as expected.C
IN1+3Floating input, circuit will likely not function as expected.C
(V-)4Lowest voltage pin will try to power internal ground via ESD diode to ground.B
IN2+5Floating input, circuit will likely not function as expected.C
IN2-6Floating input, circuit will likely not function as expected.C
OUT27Output can't be used by application.C
(V+)8Highest voltage pin will try to power internal ground via ESD diode to VCC.B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class
OUT11IN1-Negative feedback, creates unity gain buffer.C
IN1-2IN1+No damage to device, application circuit won't work.C
IN1+3(V-)Input at V- is valid input, however, desired application result is unlikely.C
(V-)4IN2+Input at V- is valid input, however, desired application result is unlikely.C
IN2+5IN2-No damage to device, application circuit won't work.C
IN2-6OUT2Negative feedback, creates unity gain buffer.C
OUT27(V+)May cause overheating.B
(V+)8OUT1May cause overheating.B
Table 4-5 Pin FMA for Device Pins Short-Circuited to (V+)
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
OUT11May cause overheating.B
IN1-2Input at V+ is valid input, however, desired application result is unlikely.C
IN1+3Input at V+ is valid input, however, desired application result is unlikely.C
(V-)4Diodes from input to V- may turn due to input signal and cause EOS.B
IN2+5Input at V+ is valid input, however, desired application result is unlikely.C
IN2-6Input at V+ is valid input, however, desired application result is unlikely.C
OUT27May cause overheating.B
(V+)8Diodes from input to V+ may turn due to input signal and cause EOS.D