SBOA386B March   2020  – October 2023 INA180-Q1 , INA181-Q1 , INA185-Q1 , INA2180-Q1 , INA2181-Q1 , INA4180-Q1 , INA4181-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 INA180-Q1, SOT-23-5 Package
    2. 2.2 INA2180-Q1, VSSOP-8 Package
    3. 2.3 INA4180-Q1, TSSOP-14 Package
    4. 2.4 INA181-Q1, SOT-23-6 Package
    5. 2.5 INA2181-Q1, VSSOP-10 Package
    6. 2.6 INA4181-Q1, TSSOP-20 Package
    7. 2.7 INA181-Q1 and INA185-Q1, DCK Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 INA180-Q1, SOT-23-5 Package (Pinout A)
    2. 4.2 INA180-Q1, SOT-23-5 Package (Pinout B)
    3. 4.3 INA2180-Q1, VSSOP-8 Package
    4. 4.4 INA4180-Q1, TSSOP-14 Package
    5. 4.5 INA181-Q1, SOT-23-6 Package
    6. 4.6 INA2181-Q1, VSSOP-10 Package
    7. 4.7 INA4181-Q1, TSSOP-20 Package
    8. 4.8 INA181-Q1 and INA185-Q1, DCK Package
  7. 5Revision History

4.7 INA4181-Q1, TSSOP-20 Package

INA4181-Q1 Pin Diagram (TSSOP-20 Package) shows the INA4181-Q1 pin diagram for the TSSOP-20 package. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the INA4181-Q1 datasheet.

GUID-20200610-SS0I-ZTDN-B22M-J0FCWP3HQ4NZ-low.png Figure 4-7 INA4181-Q1 Pin Diagram (TSSOP-20 Package)
Table 4-26 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
REF1 1 Normal operation if REF1 pin is at GND potential by design; otherwise the system measurement will be incorrect. D if REF1=GND by design; C otherwise
OUT1 2 Output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
IN-1 3 In high-side configuration, a short from the bus supply to GND will occur (through RSHUNT). High current will flow from bus supply to GND. The shunt may be damaged. In low-side configuration, normal operation. B for high-side; D for low-side
IN+1 4 In high-side configuration, a short from the bus supply to GND will occur. B
VS 5 Power supply shorted to GND. B
IN+2 6 In high-side configuration, a short from the bus supply to GND will occur. B
IN-2 7 In high-side configuration, a short from the bus supply to GND will occur (through RSHUNT). High current will flow from bus supply to GND. The shunt may be damaged. In low-side configuration, normal operation. B for high-side; D for low-side
OUT2 8 Output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
REF2 9 Normal operation if REF2 pin is at GND potential by design; otherwise the system measurement will be incorrect. D if REF2=GND by design; C otherwise
NC 10 No internal connection. D
NC 11 No internal connection. D
REF3 12 Normal operation if REF3 pin is at GND potential by design; otherwise the system measurement will be incorrect. D if REF3=GND by design; C otherwise
OUT3 13 Output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
IN-3 14 In high-side configuration, a short from the bus supply to GND will occur (through RSHUNT). High current will flow from bus supply to GND. The shunt may be damaged. In low-side configuration, normal operation. B for high-side; D for low-side
IN+3 15 In high-side configuration, a short from the bus supply to GND will occur. B
GND 16 Normal operation. D
IN+4 17 In high-side configuration, a short from the bus supply to GND will occur. B
IN-4 18 In high-side configuration, a short from the bus supply to GND will occur (through RSHUNT). High current will flow from bus supply to GND. The shunt may be damaged. In low-side configuration, normal operation. B for high-side; D for low-side
OUT4 19 Output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
REF4 20 Normal operation if REF4 pin is at GND potential by design; otherwise the system measurement will be incorrect. D if REF4=GND by design; C otherwise
Table 4-27 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
REF1 1 Output common-mode voltage is not defined. Output will not maintain a linear relationship with differential input voltage. B
OUT1 2 Output can be left open. There is no effect on the IC, but the output will not be measured. C
IN-1 3 Shunt resistor is not connected to amplifier. IN-1 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
IN+1 4 Shunt resistor is not connected to amplifier. IN+1 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
VS 5 No power to device. Device may be biased through inputs. Output will be incorrect and close to GND. B
IN+2 6 Shunt resistor is not connected to amplifier. IN+2 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
IN-2 7 Shunt resistor is not connected to amplifier. IN-2 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
OUT2 8 Output can be left open. There is no effect on the IC, but the output will not be measured. C
REF2 9 Output common-mode voltage is not defined. Output will not maintain a linear relationship with differential input voltage. B
NC 10 No internal connection. D
NC 11 No internal connection. D
REF3 12 Output common-mode voltage is not defined. Output will not maintain a linear relationship with differential input voltage. B
OUT3 13 Output can be left open. There is no effect on the IC, but the output will not be measured. C
IN-3 14 Shunt resistor is not connected to amplifier. IN-3 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
IN+3 15 Shunt resistor is not connected to amplifier. IN+3 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
GND 16 When GND is floating, output will be incorrect as it is no longer referenced to GND. B
IN+4 17 Shunt resistor is not connected to amplifier. IN+4 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
IN-4 18 Shunt resistor is not connected to amplifier. IN-4 pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
OUT4 19 Output can be left open. There is no effect on the IC, but the output will not be measured. C
REF4 20 Output common-mode voltage is not defined. Output will not maintain a linear relationship with differential input voltage. B
Table 4-28 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class
REF1 1 2 - OUT1 Output shorted to reference voltage. Output voltage will be incorrect. Depending on state of output voltage, reference voltage source may be short circuit limited. B
OUT1 2 3 - IN-1 In high-side configuration, a short from the bus voltage to the output stage will occur. The device may become damaged. In low-side configuration, output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating, could cause die junction temperature to exceed 150°C. A for high-side; B for low-side
IN-1 3 4 - IN+1 Inputs shorted together, so no sense voltage applied. Output will stay close to GND. B
IN+1 4 5 - VS In high-side configuration, device power supply shorted to bus supply. In low-side configuration, device power supply shorted to GND (through RSHUNT). A for high-side; B for low-side
VS 5 6 - IN+2 In high-side configuration, device power supply shorted to bus supply. In low-side configuration, device power supply shorted to GND (through RSHUNT). A for high-side; B for low-side
IN+2 6 7 - IN-2 Inputs shorted together, so no sense voltage applied. Output will stay close to GND. B
IN-2 7 8 - OUT2 In high-side configuration, a short from the bus voltage to the output stage will occur. The device may become damaged. In low-side configuration, output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating, could cause die junction temperature to exceed 150°C. A for high-side; B for low-side
OUT2 8 9 - REF2 Output shorted to reference voltage. Output voltage will be incorrect. Depending on state of output voltage, reference voltage source may be short circuit limited. B
REF2 9 10 - NC Normal operation. D
NC 10 11 - NC Normal operation. D
NC 11 12 - REF3 Normal operation. D
REF3 12 13 - OUT3 Output shorted to reference voltage. Output voltage will be incorrect. Depending on state of output voltage, reference voltage source may be short circuit limited. B
OUT3 13 14 - IN-3 In high-side configuration, a short from the bus voltage to the output stage will occur. The device may become damaged. In low-side configuration, output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating, could cause die junction temperature to exceed 150°C. A for high-side; B for low-side
IN-3 14 15 - IN+3 Inputs shorted together, so no sense voltage applied. Output will stay close to GND. B
IN+3 15 16 - GND In high-side configuration, a short from the bus supply to GND will occur. B
GND 16 17 - IN+4 In high-side configuration, a short from the bus supply to GND will occur. B
IN+4 17 18 - IN-4 Inputs shorted together, so no sense voltage applied. Output will stay close to GND. B
IN-4 18 19 - OUT4 In high-side configuration, a short from the bus voltage to the output stage will occur. The device may become damaged. In low-side configuration, output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating, could cause die junction temperature to exceed 150°C. A for high-side; B for low-side
OUT4 19 20 - REF4 Output shorted to reference voltage. Output voltage will be incorrect. Depending on state of output voltage, reference voltage source may be short circuit limited. B
REF4 20 1 - REF1 Normal operation if REF1 and REF4 are at the same potential by design; otherwise the system measurement will be incorrect. D if REF1=REF4 by design; B otherwise
Table 4-29 Pin FMA for Device Pins Short-Circuited to VS
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
REF1 1 Normal operation if REF1 pin is at VS potential by design; otherwise the system measurement will be incorrect. D if REF1=VS by design; B otherwise
OUT1 2 Output will be pulled to VS and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
IN-1 3 In high-side configuration, device power supply shorted to bus supply (through RSHUNT). In low-side configuration, device power supply shorted to GND. A for high-side; B for low-side
IN+1 4 In high-side configuration, device power supply shorted to bus supply. In low-side configuration, device power supply shorted to GND (through RSHUNT). A for high-side; B for low-side
VS 5 Normal operation. D
IN+2 6 In high-side configuration, device power supply shorted to bus supply. In low-side configuration, device power supply shorted to GND (through RSHUNT). A for high-side; B for low-side
IN-2 7 In high-side configuration, device power supply shorted to bus supply (through RSHUNT). In low-side configuration, device power supply shorted to GND. A for high-side; B for low-side
OUT2 8 Output will be pulled to VS and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
REF2 9 Normal operation if REF2 pin is at VS potential by design; otherwise the system measurement will be incorrect. D if REF2=VS by design; B otherwise
NC 10 No internal connection. D
NC 11 No internal connection. D
REF3 12 Normal operation if REF3 pin is at VS potential by design; otherwise the system measurement will be incorrect. D if REF3=VS by design; B otherwise
OUT3 13 Output will be pulled to VS and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
IN-3 14 In high-side configuration, device power supply shorted to bus supply (through RSHUNT). In low-side configuration, device power supply shorted to GND. A for high-side; B for low-side
IN+3 15 In high-side configuration, device power supply shorted to bus supply. In low-side configuration, device power supply shorted to GND (through RSHUNT). A for high-side; B for low-side
GND 16 Power supply shorted to GND. B
IN+4 17 In high-side configuration, device power supply shorted to bus supply. In low-side configuration, device power supply shorted to GND (through RSHUNT). A for high-side; B for low-side
IN-4 18 In high-side configuration, device power supply shorted to bus supply (through RSHUNT). In low-side configuration, device power supply shorted to GND. A for high-side; B for low-side
OUT4 19 Output will be pulled to VS and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
REF4 20 Normal operation if REF4 pin is at VS potential by design; otherwise the system measurement will be incorrect. D if REF4=VS by design; B otherwise