SBOA444 November 2020 TMCS1100
The MSP432 is configured to have its CPU clock (MCLK) set at 48 MHz and its subsystem master clock (SMCLK) set to 8.192 MHz. The clock source for MCLK is the internal DCO of the MSP432 MCU, which is configured for a frequency of 48 MHz.
The clock source for SMCLK is an external crystal. The MSP432 LaunchPad comes with a 48 MHz crystal (part number FA-238 48.0000MB-W0) by default, which is replaced with a 16.384 MHz crystal (part number: FA-238 16.3840MB-K). The new crystal also requires a 10-pF load capacitance instead of the 12-pF load capacitance of the previous crystal. To support this new crystal, the C11 and C12 22-pF crystal load capacitors were changed to 18-pF capacitors. The 16.384-MHz clock from the external crystal is internally divided by two to create the 8.192-MHz SMCLK frequency. Please note that the clock for the ADS131M08 is derived from its own 8.000-MHz crystal, so it is independent of the 8.192 MHz SMCLK of the MCU.
An external 32.768- kHz crystal is used as the clock source for the auxiliary clock (ACLK) of the device. This ACLK clock is set to a frequency of 32.768 kHz.