SBOA590 November   2024 OPA186 , OPA206 , OPA328 , OPA391 , OPA928

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Input Offset Voltage (VOS) Definition
    1. 1.1 Input Offset Voltage Drift (dVOS/dT) Definition
    2. 1.2 VOS and VOS Temperature Drift Inside the Amplifier
    3. 1.3 Laser Trim to Adjust Performance
    4. 1.4 Package Trim (e-Trim™) to Adjust Performance
  5. 2Input bias current (IB) definition
    1. 2.1 Input Bias Current (IB) and IB Temperature Drift Inside the Amplifier
    2. 2.2 Derivation of IB Conversion to VOS
    3. 2.3 Internal Bias Current Cancelation
    4. 2.4 Super Beta Input Transistors
  6. 3Other Factors Influencing Offset
    1. 3.1 Finite Open Loop Gain (AOL)
    2. 3.2 Common Mode Rejection Ratio (CMRR)
    3. 3.3 Power Supply Rejection Ratio (PSRR)
    4. 3.4 AOL, CMRR, and PSRR Over Frequency
    5. 3.5 Electromagnetic Interference Ratio (EMIRR)
    6. 3.6 Mechanical Stress Induced Offset Shift
    7. 3.7 Parasitic Thermocouples
    8. 3.8 Flux Residue and Cleanliness
  7. 4Zero-drift Amplifiers to Minimize VOS and VOS Drift
  8. 5Calibration of VOS, IB, and Gain Error
  9. 6References
  10. 7Revision History

6 References