SBOA590 November   2024 OPA186 , OPA206 , OPA328 , OPA391 , OPA928

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Input Offset Voltage (VOS) Definition
    1. 1.1 Input Offset Voltage Drift (dVOS/dT) Definition
    2. 1.2 VOS and VOS Temperature Drift Inside the Amplifier
    3. 1.3 Laser Trim to Adjust Performance
    4. 1.4 Package Trim (e-Trim™) to Adjust Performance
  5. 2Input bias current (IB) definition
    1. 2.1 Input Bias Current (IB) and IB Temperature Drift Inside the Amplifier
    2. 2.2 Derivation of IB Conversion to VOS
    3. 2.3 Internal Bias Current Cancelation
    4. 2.4 Super Beta Input Transistors
  6. 3Other Factors Influencing Offset
    1. 3.1 Finite Open Loop Gain (AOL)
    2. 3.2 Common Mode Rejection Ratio (CMRR)
    3. 3.3 Power Supply Rejection Ratio (PSRR)
    4. 3.4 AOL, CMRR, and PSRR Over Frequency
    5. 3.5 Electromagnetic Interference Ratio (EMIRR)
    6. 3.6 Mechanical Stress Induced Offset Shift
    7. 3.7 Parasitic Thermocouples
    8. 3.8 Flux Residue and Cleanliness
  7. 4Zero-drift Amplifiers to Minimize VOS and VOS Drift
  8. 5Calibration of VOS, IB, and Gain Error
  9. 6References
  10. 7Revision History

2.2 Derivation of IB Conversion to VOS

Figure 2-9 shows the op amp model for bias current. Using the principle of superposition, you can determine the offset shift for each of the bias current sources separately, then combine the result. In superposition, only one source is considered at a time and the unused current sources are replaced with opens while the unused voltage sources are replaced with shorts. Figure 2-10 shows the superposition diagram for calculation of the output offset due to IBN. Considering the amplifier to be ideal, there is a virtual short between the inverting and non-inverting input terminals. Since the non-inverting input is grounded, the inverting input is virtually grounded and the voltage across RG is 0 V. Thus, there is no current through RG so all the bias current flows through RF. The output offset is IBNRF (see Equation 27). This offset can be referred to the input by dividing its magnitude by the op amp closed loop gain. Simplifying this equation yields Equation 28. Thus, the offset referred to the input from IBN is the bias current multiplied by the parallel combination of RF and RG.

Equation 27. VIBN_RTO=IBNRF
Equation 28. VIBN=VIBN_RTOG=IBNRFRF/RG+1=IBNRFRGRF+RG=IBNRF||RG
OPA206 Op Amp Model for Bias Current Figure 2-9 Op Amp Model for Bias Current
OPA206 Offset Due to IBN for Superposition Calculation Figure 2-10 Offset Due to IBN for Superposition Calculation

Figure 2-11 shows the superposition diagram for calculation of the output offset due to IBP. In this case the offset calculation is simply the bias current multiplied by the source impedance, VIBP = -IBPRS. Note that when the bias current from both the inverting and non-inverting input flow in the same direction, the polarity of the offset generated by inverting and non-inverting inputs oppose each other. In cases where IBN = IBP and both currents flow in the same direction, the feedback network impedance and source impedance can be balanced to cancel the bias current effects, RS = (RF || RG). However, in general two CMOS input bias currents and chopper transients are not equal, so balancing their impedances may not improve the bias current generated offset voltage error much and may actually make the error worse. Section 4 covers this topic in more detail.

OPA206 Offset Due to IBP for Superposition Calculation Figure 2-11 Offset Due to IBP for Superposition Calculation