SBOS974E August   2019  – October 2024

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = 12 V
    6. 5.6 Electrical Characteristics VS = 32 V
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics: VS = 12 V
    9. 5.9 Typical Characteristics: VS = 32 V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Common-Mode Buffer
      2. 6.3.2 Thermal Protection and Package Power Dissipation
      3. 6.3.3 Output Voltage and Current Drive
      4. 6.3.4 Breakdown Supply Voltage
      5. 6.3.5 Surge Test Results
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Broadband PLC Line Driving
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Best Design Practices
      1. 7.3.1 Do
      2. 7.3.2 Do Not
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Wafer and Die Information
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.9 Typical Characteristics: VS = 32 V

at TA ≈ 25°C, AV = 10 V/V, RF = 1.24 kΩ, RL = 100 Ω, RS = 2.5 Ω, RADJ = 0 Ω, full-bias mode, and VCM = open (unless otherwise noted)

THS6222 Small-Signal Frequency Response
VO = 2 VPP
Figure 5-37 Small-Signal Frequency Response
THS6222 Large-Signal Frequency Response vs VO
AV = 10 V/V
Figure 5-39 Large-Signal Frequency Response vs VO
THS6222 Large-Signal Frequency Response vs Bias Modes
VO = 40 VPP
Figure 5-41 Large-Signal Frequency Response vs Bias Modes
THS6222 Harmonic Distortion vs Frequency
VO = 2 VPP
Figure 5-43 Harmonic Distortion vs Frequency
THS6222 Harmonic Distortion vs VO
f = 1 MHz, RL = 50 Ω
Figure 5-45 Harmonic Distortion vs VO
THS6222 Harmonic Distortion vs RL
f = 1 MHz, VO = 2 VPP
Figure 5-47 Harmonic Distortion vs RL
THS6222 Small-Signal Pulse Response
VO step = 2 VPP
Figure 5-49 Small-Signal Pulse Response
THS6222 Single-Ended Output Voltage vs IO and Temperature
Average of 30 devices
Output voltage was slammed and IO was pulsed to maintain TJ as close to TA as possible.
Figure 5-51 Single-Ended Output Voltage vs IO and Temperature
THS6222 Small-Signal Frequency Response vs RF
VO = 2 VPP
Figure 5-38 Small-Signal Frequency Response vs RF
THS6222 Large-Signal Frequency Response vs VO
AV = 15 V/V
Figure 5-40 Large-Signal Frequency Response vs VO
THS6222 Intermodulation Distortion vs Frequency
 
Figure 5-42 Intermodulation Distortion vs Frequency
THS6222 Harmonic Distortion vs Gain
f = 1 MHz, VO = 2 VPP RL = 50 Ω
Figure 5-44 Harmonic Distortion vs Gain
THS6222 Harmonic Distortion vs VO
f = 10 MHz, RL = 50 Ω
Figure 5-46 Harmonic Distortion vs VO
THS6222 Harmonic Distortion vs RL
f = 10 MHz, VO = 2 VPP
Figure 5-48 Harmonic Distortion vs RL
THS6222 Large-Signal Pulse Response
VO step = 40 VPP
Figure 5-50 Large-Signal Pulse Response
THS6222 Quiescent Current vs RADJ
Average of 30 devices
 
 
Figure 5-52 Quiescent Current vs RADJ