SBOSA30D March   2022  – December 2024

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Amplifier Input Common-Mode Signal
        1. 7.3.1.1 Enhanced PWM Rejection Operation
        2. 7.3.1.2 Input-Signal Bandwidth
        3. 7.3.1.3 Low Input Bias Current
        4. 7.3.1.4 Low VSENSE Operation
        5. 7.3.1.5 Wide Fixed Gain Output
        6. 7.3.1.6 Wide Supply Range
    4. 7.4 Device Functional Modes
      1. 7.4.1 Adjusting the Output With the Reference Pins
      2. 7.4.2 Reference Pin Connections for Unidirectional Current Measurements
        1. 7.4.2.1 Ground Referenced Output
        2. 7.4.2.2 VS Referenced Output
      3. 7.4.3 Reference Pin Connections for Bidirectional Current Measurements
        1. 7.4.3.1 Output Set to External Reference Voltage
        2. 7.4.3.2 Output Set to Mid-Supply Voltage
        3. 7.4.3.3 Output Set to Mid-External Reference
        4. 7.4.3.4 Output Set Using Resistor Divider
      4. 7.4.4 High Signal Throughput
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 RSENSE and Device Gain Selection
    2. 8.2 Typical Application
      1. 8.2.1 Inline Motor Current-Sense Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Supply Decoupling
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.5 Electrical Characteristics

at TA = 25 °C, VS = 5V, VSENSE = VIN+ – VIN–, VCM = VIN– = 48V, and VREF1 = VREF2 = VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
VCM Common-mode input range(1) VIN+, VIN– = –5V to 110V, VSENSE = 0mV
TA = –40°C to 125°C		 –5 110 V
CMRR Common-mode rejection ratio, input-referred VIN+, VIN– = –5V to 110V, VSENSE = 0mV
TA = –40°C to 125°C, INA241A		 150 166 dB
VIN+, VIN– = –5V to 110V, VSENSE = 0mV
TA = –40°C to 125°C, INA241B		 120 130
f = 50kHz 105
Vos Offset voltage, input-referred VSENSE = 0mV, INA241A1 ±5 ±20 µV
VSENSE = 0mV, INA241A2 ±3 ±15
VSENSE = 0mV, INA241A3, INA241A4 ±3 ±10
VSENSE = 0mV, INA241A5 ±2 ±8
VSENSE = 0mV, INA241B ±25 ±150
dVos/dT Offset voltage drift, input-referred TA = –40°C to 125°C, INA241A1 ±50 ±250 nV/°C
TA = –40°C to 125°C, INA241A2 ±30 ±150
TA = –40°C to 125°C, INA241A3, INA241A4, INA241A5 ±20 ±100
TA = –40°C to 125°C, INA241B ±100 ±500
PSRR Power-supply rejection ratio, input-referred VS = 2.7V to 20V, VSENSE = 0mV, 
VREF1 = VREF2 = 1V, 
TA = –40°C to 125°C, INA241A1		 ±0.2 ±1 µV/V
VS = 2.7V to 20V, VSENSE = 0mV,
VREF1 = VREF2 = 1V, 
TA = –40°C to 125°C, INA241A2		 ±0.1 ±0.75
VS = 2.7V to 20V, VSENSE = 0mV, 
VREF1 = VREF2 = 1V, 
TA = –40°C to 125°C, INA241A3, INA241A4, INA241A5		 ±0.06 ±0.5
VS = 2.7V to 20V, VSENSE = 0mV,
VREF1 = VREF2 = 1V, 
TA = –40°C to 125°C, INA241B		 ±1 ±10
IB Input bias current IB+, IB–, VSENSE=0mV 25 35 45 µA
Reference input range  0 VS V
OUTPUT
G Gain A1, B1 Devices 10 V/V
A2, B2 Devices 20 V/V
A3, B3 Devices 50 V/V
A4, B4 Devices 100 V/V
A5, B5 Devices 200 V/V
GERR Gain Error (GND + 50mV) < VOUT < (VS - 200mV), 
INA241A1, INA241A2, INA241A3		 ±0.002 ±0.01 %
(GND + 50mV) < VOUT < (VS - 200mV), 
INA241A4, INA241A5		 ±0.003 ±0.015
(GND + 50mV) < VOUT < (VS - 200mV),
INA241B		 ±0.02 ±0.1
Gain Error Drift TA = –40°C to +125°C, 
INA241A1, INA241A2, INA241A3		 ±0.05 ±1 ppm/°C
TA = –40°C to +125°C,
INA241A4, INA241A5		 ±0.1 ±2
TA = –40°C to +125°C,
INA241B		 ±0.2 ±5
Non-Linearity Error ±0.001 %
Maximum Capacitive Load No sustained oscillations, No isolation resistor 1 nF
VOLTAGE OUTPUT
Swing to VS Power Supply Rail RL = 10kΩ to GND,
TA = –40°C to +125°C		 VS − 0.07 VS − 0.2 V
Swing to Ground RL = 10kΩ to GND, VSENSE = 0mV, VREF1 = VREF2 = 0V,
TA = –40°C to +125°C		 8 20 mV
REFERENCE INPUT
RVRR Reference voltage rejection ratio, input-referred VREF1 = VREF2 = 0.5V to 4.5V,
TA = –40°C to +125°C, INA241A1		 ±1 ±2.5 µV/V
VREF1 = VREF2 = 0.5V to 4.5V,
TA = –40°C to +125°C, INA241A2, INA241A3, INA241A4, INA241A5		 ±0.5 ±1.5
VREF1 = VREF2 = 0.5V to 4.5V,
TA = –40°C to +125°C, INA241B,		 ±10 ±20
Reference divider accuracy VOUT = |(VREF1 + VREF2)| / 2 at VSENSE =0mV,
VREF1 = VS, VREF2 = GND
VREF1 = GND, VREF2 = VS
TA = –40°C to +125°C, INA241A1, INA241A2		 ±0.002 ±0.005 %
VOUT = |(VREF1 + VREF2)| / 2 at VSENSE =0mV,
VREF1 = VS, VREF2 = GND
VREF1 = GND, VREF2 = VS
TA = –40°C to +125°C, INA241A3, INA241A4, INA241A5		 ±0.002 ±0.01
VOUT = |(VREF1 + VREF2)| / 2 at VSENSE =0mV,
VREF1 = VS, VREF2 = GND
VREF1 = GND, VREF2 = VS
TA = –40°C to +125°C, INA241B		 ±0.02 ±0.15
FREQUENCY RESPONSE
BW Bandwidth All Gains, −3dB Bandwidth 1.1 MHz
Settling time VIN+, VIN– = 48V, VOUT = 0.5V to 4.5V,
Output settles to 0.5%		 1.5 µs
VIN+, VIN– = 48V, VOUT = 0.5V to 4.5V,
Output settles to 1%		 1 µs
VIN+, VIN– = 48V, VOUT = 0.5V to 4.5V,
Output settles to 5%		 0.5 µs
SR Slew Rate Rising 8 V/µs
NOISE (Input referred)
Voltage noise density A1, B1 Devices 62 nV/√Hz
A2, B2 Devices 49
A3, B3 Devices 39
A4, B4 Devices 36
A5, B5 Devices 28
POWER SUPPLY
VS Supply Voltage 2.7 20 V
IQ Quiescent current VSENSE = 0mV 2.5 3 mA
VSENSE = 0mV,
TA = –40°C to +125°C		 3.2 mA
TEMPERATURE
TA Specified Range –40 125 °C
(1) Common-mode voltage at both VIN+ and VIN- must not exceed the specified common-mode input range.