SBOU162A March 2017 – May 2017
Figure 33 shows the schematic for the non-inverting comparator circuit configuration.
It is important to note that this circuit layout is meant for SOIC package op amp or push-pull output type comparators. This configuration uses a voltage divider R3 and R4 to set up the threshold voltage. The comparator will compare the input signal (Vin) to the threshold voltage (Vth).
The comparator input signal is applied to the non-inverting input, so the output will have a non-inverted polarity. When Vin > Vth, the output will drive to the positive supply (V+ or logic high). When Vin < Vth, the output will drive to the negative supply (GND or logic low).
R2 can be populated to implement hysteresis which uses two different threshold voltages to avoid the multiple transitions. The input signal must exceed the upper threshold (VH) to transition high or below the lower threshold (VL) to transition low. Equation 22 and Equation 23 will calculate the value of R1 and R2 for the two desired thresholds.
The PCB layout of the top layer of the non-inverting comparator circuit configuration is displayed in Figure 34.
The PCB layout of the top layer of the non-inverting comparator circuit configuration is displayed in Figure 35.