SBOU317 September   2024

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Power Connections
      1. 2.1.1 Split-Supply Operation
      2. 2.1.2 Single-Supply Operation
    2. 2.2 Input and Output Connections
      1. 2.2.1 Bias Mode Control Pins
      2. 2.2.2 IADJ Pin Connection
      3. 2.2.3 Optional VCM Pin Connection
  7. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 Board Layout
    3. 3.3 Bill of Materials
  8. 4Additional Information
    1. 4.1 Trademarks
  9. 5Related Documentation

1.4 Device Information

The high-speed line driver EVM is setup for selecting bias modes using jumpers to either LOGIC 0 or LOGIC 1 voltage levels. These bias modes select the quiescent current of the THS6232RHFR. The option is available to use in either single or split-supply configuration, as well as to amend the output network of the amplifier for application-specific loading (pi-attenuator, etc). A potentiometer is available for fine adjustment of IADJ pin, as well as series & parallel zero-Ohm resistors for floating or bypassing the IADJ pin to GND. The THS6232RHFR is available in a 24-pin VQFN package with a 5mm x 4mm footprint. See the THS6232 7V-to-40V, Differential HPLC Line Driver with Common-Mode Buffer Data Sheet for more information.