TPS7A4001 100-V Input Voltage, 50-mA, Very High Voltage Linear Regulator
- SBVS162B March 2011 – July 2015
  
  PRODUCTION DATA.

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DATA SHEET

TPS7A4001 100-V Input Voltage, 50-mA, Very High Voltage Linear Regulator

1 Features

Very High Maximum Input Voltage: 100 V
Wide Input Voltage Range: 7 to 100 V
Accuracy:
- Nominal: 1%
- Over Line, Load, and Temperature: 2.5%
Low Quiescent Current: 25 µA
Quiescent Current at Shutdown: 4.1 µA
Maximum Output Current: 50 mA
CMOS Logic-Level-Compatible Enable Pin
Adjustable Output Voltage from about 1.175 to
90 V
Stable With Ceramic Capacitors:
- Input Capacitance: ≥1 µF
- Output Capacitance: ≥4.7 µF
Dropout Voltage: 290 mV
Built-In Current Limit and Thermal Shutdown Protection
Package: High Thermal Performance HVSSOPPowerPAD™
Operating Temperature Range: –40°C to 125°C

2 Applications

Microprocessors, Microcontrollers Powered by Industrial Busses With High Voltage Transients
Industrial Automation
Telecom Infrastructure
Automotive
Power over Ethernet (PoE)
LED Lighting
Bias Power Supplies

3 Description

The TPS7A4001 device is a very high voltage-tolerant linear regulator that offers the benefits of a thermally-enhanced package (HVSSOP), and is able to withstand continuous DC or transient input voltages of up to 100 V.

The TPS7A4001 device is stable with any output capacitance greater than 4.7 µF and any input capacitance greater than 1 µF (over temperature and tolerance). Therefore, implementations of this device require minimal board space because of its miniaturized packaging (HVSSOP) and a potentially small output capacitor. In addition, the TPS7A4001 device offers an enable pin (EN) compatible with standard CMOS logic to enable a low-current shutdown mode.

The TPS7A4001 device has an internal thermal shutdown and current limiting to protect the system during fault conditions. The HVSSOP packages has an operating temperature range of T_J = –40°C to 125°C.

In addition, the TPS7A4001 device is ideal for generating a low-voltage supply from intermediate voltage rails in telecom and industrial applications; not only can it supply a well-regulated voltage rail, but it can also withstand and maintain regulation during very high and fast voltage transients. These features translate to simpler and more cost-effective electrical surge-protection circuitry for a wide range of applications, including PoE, bias supply, and LED lighting.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
TPS7A4001	HVSSOP (8)	3.00 mm × 5.00 mm

For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Schematic

4 Revision History

Changes from A Revision (March 2011) to B Revision

Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section. Go
Changed Package from MSOP-8 to HVSSOP. Go
Changed T_J value for disabled mode operating mode from 165 to 170°CGo
Changed value from 35 to 45°CGo

Changes from * Revision (March 2011) to A Revision

Changed all 105 V to 100 V on page 1Go

5 Pin Configuration and Functions

DGN Package

8-Pin HVSSOP

Top View

Pin Functions

PIN		I/O	DESCRIPTION
NAME	NO.	I/O	DESCRIPTION
OUT	1	O	Regulator output. A capacitor > 4.7 µF must be tied from this pin to ground to assure stability.
FB	2	O	This pin is the input to the control-loop error amplifier. It is used to set the output voltage of the device.
NC	3	—	Not internally connected. This pin must either be left open or tied to GND.
	6
	7
GND	4	—	Ground
EN	5	I	This pin turns the regulator on or off. If V_EN ≥ V_{EN_HI} the regulator is enabled. If V_EN ≤ V_{EN_LO}, the regulator is disabled. If not used, the EN pin can be connected to IN. Make sure that V_EN ≤ V_IN at all times.
IN	8	I	Input supply
PowerPAD	—	—	Solder to printed-circuit-board (PCB) to enhance thermal performance. NOTE: The PowerPAD is internally connected to GND. Although it can be left floating, TI highly recommends connecting the PowerPAD to the GND plane.

6 Specifications

6.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Voltage	IN pin to GND pin	–0.3	105	V
	OUT pin to GND pin	–0.3	105
	OUT pin to IN pin	–105	0.3
	FB pin to GND pin	–0.3	2
	FB pin to IN pin	–105	0.3
	EN pin to IN pin	–105	0.3
	EN pin to GND pin	–0.3	105
Current	Peak output	Internally limited
Temperature	Operating virtual junction, T_J	–40	125	°C
Temperature	Storage, T_stg	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2500	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating junction temperature range (unless otherwise noted)

	MIN	MAX	UNIT
VIN	7	100	V
VOUT	1.161	90	V
VEN	0	100	V
IOUT	0	50	mA

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS7A4001	UNIT
		DGN (HVVSOP)
		8 PINS
R_θJA	Junction-to-ambient thermal resistance	66.7	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	54.1	°C/W
R_θJB	Junction-to-board thermal resistance	38.1	°C/W
ψ_JT	Junction-to-top characterization parameter	2	°C/W
ψ_JB	Junction-to-board characterization parameter	37.8	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	15.5	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

At T_J= –40°C to 125°C, V_IN = V_OUT(NOM) + 2 V or V_IN = 7 V (whichever is greater), V_EN = V_IN, I_OUT = 100 µA, C_IN = 1 μF, C_OUT = 4.7 μF, and FB tied to OUT, unless otherwise noted.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_IN	Input voltage		7		100	V
V_REF	Internal reference	T_J = 25°C, V_FB = V_REF, V_IN = 9 V, I_OUT = 25 mA	1.161	1.173	1.185	V
V_OUT	Output voltage range⁽¹⁾	V_IN ≥ V_OUT(NOM) + 2 V	V_REF		90	V
	Nominal accuracy	T_J = 25°C, V_IN = 9 V, I_OUT = 25 mA	–1		1	%V_OUT
	Overall accuracy	V_OUT(NOM) + 2 V ≤ V_IN ≤ 24 V⁽²⁾ 100 µA ≤ I_OUT ≤ 50 mA	–2.5		2.5	%V_OUT
	Line regulation	7 V ≤ V_IN ≤ 100 V		0.03		%V_OUT
	Load regulation	100 µA ≤ I_OUT ≤ 50 mA		0.31		%V_OUT
V_DO	Dropout voltage	V_IN = 17 V, V_OUT(NOM) = 18 V, I_OUT = 20 mA		290		mV
V_DO	Dropout voltage	V_IN = 17 V, V_OUT(NOM) = 18 V, I_OUT = 50mA		0.78	1.3	V
I_LIM	Current limit	V_OUT = 90% V_OUT(NOM), V_IN = 7 V, T_J ≤ 85°C	51	117	200	mA
I_LIM	Current limit	V_OUT = 90% V_OUT(NOM), V_IN = 9 V	51	128	200	mA
I_GND	Ground current	7 V ≤ V_IN ≤ 100 V, I_OUT = 0 mA		25	65	μA
I_GND	Ground current	I_OUT = 50 mA		25		μA
I_SHDN	Shutdown supply current	V_EN = 0.4 V		4.1	20	μA
I_FB	Feedback current⁽³⁾		–0.1	0.01	0.1	µA
I_EN	Enable current	7 V ≤ V_IN ≤ 100 V, V_IN = V_EN		0.02	1	μA
V_{EN_HI}	Enable high-level voltage		1.5		V_IN	V
V_{EN_LO}	Enable low- level voltage		0		0.4	V
V_NOISE	Output noise voltage	V_IN = 12 V, V_OUT(NOM) = V_REF, C_OUT = 10 μF, BW = 10 Hz to 100 kHz		58		μV_RMS
V_NOISE	Output noise voltage	V_IN = 12 V, V_OUT(NOM) = 5 V, C_OUT = 10 μF, C_BYP⁽⁴⁾ = 10 nF, BW = 10 Hz to 100 kHz		73		μV_RMS
PSRR	Power-supply rejection ratio	V_IN = 12 V, V_OUT(NOM) = 5 V, C_OUT = 10 μF, C_BYP⁽⁴⁾ = 10 nF, ƒ = 100 Hz		65		dB
T_SD	Thermal shutdown temperature	Shutdown, temperature increasing		170		°C
T_SD	Thermal shutdown temperature	Reset, temperature decreasing		150		°C
T_J	Operating junction temperature		–40		125	°C

(1) To ensure stability at no-load conditions, a current from the feedback resistive network greater than or equal to 10μA is required.

(2) Maximum input voltage is limited to 24 V because of the package power dissipation limitations at full load (P ≈ (V_IN – V_OUT) × I_OUT = (24 V – V_REF) × 50 mA ≈ 1.14 W). The device is capable of sourcing a maximum current of 50 mA at higher input voltages as long as the power dissipated is within the thermal limits of the package plus any external heatsinking.

(3) I_FB > 0 flows out of the device.

(4) C_BYP refers to a bypass capacitor connected to the FB and OUT pins.

6.6 Typical Characteristics

At T_J= –40°C to 125°C, V_IN = V_OUT(NOM) + 2 V or V_IN = 9 V (whichever is greater), V_EN = V_IN, I_OUT = 100 µA, C_IN = 1 μF, C_OUT = 4.7 μF, and FB tied to OUT, unless otherwise noted.

Figure 1. Line Transient Response vs C_BYP

Figure 3. Line Regulation

Figure 5. Ground Current vs Input Voltage

Figure 7. Ground Current vs Output Voltage

Figure 9. Enable Threshold Voltage

Figure 11. Current Limit

Figure 2. Load Transient Response

Figure 4. Feedback Voltage

Figure 6. Feedback Current

Figure 8. Dropout Voltage

Figure 10. Output Spectral Noise Density

Figure 12. Power-Supply Rejection Ratio

7 Detailed Description

7.1 Overview

The TPS7A4001 device belongs to a new generation of linear regulators that use an innovative BiCMOS process technology to achieve very high maximum input and output voltages.

This process not only allows the TPS7A4001 device to maintain regulation during very fast high-voltage transients up to 105 V, but it also allows the TPS7A4001 device to regulate from a continuous high-voltage input rail. Unlike other regulators created using bipolar technology, the ground current of the TPS7A4001 device is also constant over its output current range, resulting in increased efficiency and lower power consumption.

These features, combined with a high thermal performance HVSSOP PowerPAD package, make this device ideal for industrial and telecom applications.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Internal Current Limit

The fixed internal current limit of the TPS7A4001 device helps protect the regulator during fault conditions. The maximum amount of current the device can source is the current limit (309 mA, typical), and is largely independent of output voltage. For reliable operation, the device does not operate in current limit for extended periods of time.

7.3.2 Enable Pin Operation

The TPS7A4001 device provides an enable pin (EN) feature that turns on the regulator when V_EN > V_{EN_HI}, and disables the regulator when V_EN < V_{EN_LO}.

7.3.3 Thermal Protection

Thermal protection disables the output when the junction temperature rises to approximately 170°C, allowing the device to cool. When the junction temperature cools to approximately 150°C, the output circuitry is enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a result of overheating.

Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, limit junction temperature to a maximum of 125°C. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, trigger thermal protection at least 35°C above the maximum expected ambient condition of your particular application. This configuration produces a worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load.

The internal protection circuitry of the TPS7A4001 device has been designed to protect against overload conditions. The protection circuitry was not intended to replace proper heatsinking. Continuously running the TPS7A4001 device into thermal shutdown degrades device reliability.

7.3.4 Undervoltage Lockout (UVLO)

The TPS7A4001 contains an Undervoltage Lockout comparator that ensures the error amplifier is disabled when the input voltage is below the required minimum operational voltage. The minimum recommended operational voltage is 7 V.

7.4 Device Functional Modes

7.4.1 Normal Operation

The device regulates to the nominal output voltage under the following conditions:

The input voltage is at least as high as V_IN(min).
The input voltage is greater than the nominal output voltage added to the dropout voltage.
The enable voltage has previously exceeded the enable rising threshold voltage and has not decreased below the enable falling threshold.
The output current is less than the current limit.
The device junction temperature is less than the maximum specified junction temperature.

7.4.2 Dropout Operation

If the input voltage is lower than the nominal output voltage plus the specified dropout voltage, but all other conditions are met for normal operation, the device operates in dropout mode. In this mode of operation, the output voltage is the same as the input voltage minus the dropout voltage. The transient performance of the device is significantly degraded because the pass device (as a bipolar junction transistor, or BJT) is in saturation and no longer controls the current through the LDO. Line or load transients in dropout can result in large output voltage deviations.

7.4.3 Disabled

The device is disabled under the following conditions:

The enable voltage is less than the enable falling threshold voltage or has not yet exceeded the enable rising threshold.
The device junction temperature is greater than the thermal shutdown temperature.

Table 1 lists the conditions that lead to the different modes of operation.

Table 1. Device Functional Mode Comparison

OPERATING MODE	PARAMETER
OPERATING MODE	V_IN	V_EN	I_OUT	T_J
Normal mode	V_IN > V_OUT(nom) + V_DO and V_IN > V_IN(min)	V_EN > V_{EN_HI}	I_OUT < I_LIM	T _J < 125°C
Dropout mode	V_IN(min) < V_IN < V_OUT(nom) + V_DO	V_EN > V_{EN_HI}	—	T_J < 125°C
Disabled mode (any true condition disables the device)	—	V_EN < V_{EN_LO}	—	T_J > 170°C