SBVU070B September   2021  – August 2022 TPS7A94

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Before You Begin
  4. 2EVM Setup
    1. 2.1 Inputs/Outputs Connectors and Jumper Descriptions
      1. 2.1.1  J1 – IN
      2. 2.1.2  J2 – OUT
      3. 2.1.3  J3
      4. 2.1.4  TP1 – IN
      5. 2.1.5  TP2 – PG
      6. 2.1.6  TP3 – SNS
      7. 2.1.7  TP4 – PG_FB
      8. 2.1.8  TP5 – OUT
      9. 2.1.9  TP6 – EN
      10. 2.1.10 TP7 – GND
      11. 2.1.11 TP8 – GND
    2. 2.2 Soldering Guidelines
    3. 2.3 Equipment Connections
  5. 3Operation
  6. 4PCB Layout
  7. 5Schematic
  8. 6Bill of Materials
  9. 7Revision History

2.1.5 TP2 – PG

Power-good sense connection.

Note:

If the EVM is implemented as described in Section 5 with R3 and R7 set to 10 kΩ, the PG pin is thus programmed to indicate a valid output when the output reaches 50% of the targeted value. This operating mode is valid because the device is set for 100% current limit. See the TPS7A94 data sheet to set the PG_FB resistor divider.