SBVU075 April 2022
The TPS7A57EVM-056 evaluation module contains the TPS7A57 low-dropout regulator (LDO) with input and output capacitors installed. Additional pads are available to test the LDO with additional input and output capacitors beyond what is already installed on the EVM. The TPS7A57 LDO can be enabled or disabled by using the J4 3-pin header.
Alternatively, by connecting an external function generator to TP2 (EN) and a nearby GND, the user can enable or disable the TPS7A57 LDO after VIN is applied. Figure 2-1 shows the result of the TPS7A57EVM-056 during turn-on. The blue trace is the enable voltage and the pink trace is the output voltage.
If desired, a current probe can be inserted in the EVM as shown in Figure 2-2 to measure the output current. The slot was sized to fit most current probes, such as the LeCroy™ AP015 or CP031 current probes.
The user has three options for providing a DC load on the output of the TPS7A57. J17 can be used to place a DC load that flows through the current sense path and use the IOUT loop to measure the current. The second option is to use the R16, R17, R18, R19, and R20 footprints to place a DC load and use the IOUT loop to measure this current. Alternatively, the J13 (VOUT) and J14 (GND) banana connectors can be used for external measurements and loading; however, the IOUT loop does not sense current flowing through these connectors. In cases where very fast transient tests are performed, ringing may occur on VIN or VOUT as a result of the parasitic inductance within the PCB of the EVM. A strip of wire placed on the exposed copper in the current path can help reduce this ringing. Select the correct size of additional wire to fill the volume of the current probe. For most current probes, a 10 AWG wire can be used.
Optional kelvin sense points are provided using the SMA connectors VIN_SNS1 and VOUT_SNS.