SBVU085
December 2024
1
Description
Features
Applications
5
1
Evaluation Module Overview
1.1
Introduction
1.2
Kit Contents
1.3
Specification
1.4
Device Information
2
Hardware
2.1
Power Requirements
2.1.1
EVM Connections
2.1.2
Test Equipment
2.1.3
Recommended Test Setup
2.1.3.1
Input Connections
2.1.3.2
Output Connections
2.1.4
Test Procedure
2.1.4.1
TPS7N53 LDO Operation
3
Implementation Results
3.1
Performance Data and Results
4
Hardware Design Files
4.1
Schematics
4.2
PCB Layouts
4.3
Bill of Materials (BOM)
5
Compliance Information
5.1
Compliance and Certifications
6
Additional Information
6.1
Trademarks
7
Related Documentation
7.1
Supplemental Content
4.2
PCB Layouts
Figure 4-4
Top Assembly Layer and Silkscreen
Figure 4-6
Layer 2
Figure 4-8
Layer 4
Figure 4-10
Layer 6
Figure 4-12
Bottom Layer Routing
Figure 4-5
Top Layer Routing
Figure 4-7
Layer 3
Figure 4-9
Layer 5
Figure 4-11
Layer 7
Figure 4-13
Bottom Assembly Layer and Silkscreen