SCLA017A July   2019  – April 2021 SN74HC595

 

  1.   Trademarks
  2. 1Block Diagram
  3. 2Optimizing System Controller I/O Usage
  4. 3Logic and Translation Use Cases
    1. 3.1 Logic Use Cases
      1. 3.1.1 Combine Power Good Signals
      2. 3.1.2 Debounce Switches and Buttons
      3. 3.1.3 Increase Number of Controller Inputs
      4. 3.1.4 Increase Number of Controller Outputs
    2. 3.2 Voltage Translation Use Cases
      1. 3.2.1 SPI Communication
      2. 3.2.2 RMII Communication
  5. 4Recommended Logic and Translation Families for Network Switches
    1. 4.1 AXC: Advanced eXtremely Low-Voltage CMOS Translation
    2. 4.2 LVC: Low-Voltage CMOS Logic and Translation
    3. 4.3 HC: High-speed CMOS Logic
  6. 5Revision History

3.1.2 Debounce Switches and Buttons

GUID-A5824919-6D76-4A18-8A15-A80F5AA0453E-low.gifFigure 3-2 Using Logic to Prevent Multiple Triggers of a CMOS Input Due to Switch Bounce
  • Prevents multiple triggers of CMOS inputs due to switch bounce
  • Works when the system controller is asleep
  • Works without a system controller
  • Reduces controller code complexity, no software debounce required
  • See the Logic Minute video Debounce a Switch for more information about this use case
  • See online parametric search tool to find the right Schmitt-trigger buffer