SFFS542 October 2022 ISO1640-Q1

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the ISO1640-Q1 ( in 8-D and 16-DW packages). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Pin short-circuited to Ground (see Table 4-2 and Table 4-6.)
Pin open-circuited (seeTable 4-3 and Table 4-7)
Pin short-circuited to an adjacent pin (see Table 4-4 and Table 4-8)
Pin short-circuited to supply (see Table 4-5 and Table 4-9)

Table 4-2 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in #GUID-59152F0C-E454-4A8E-8EBF-F57DDDD860F8/GUID-F0AD1A50-620E-4CFA-A6FD-923BE4F4DEE4.

Table 4-1 TI Classification of Failure Effects

Class	Failure Effects
A	Potential device damage that affects functionality
B	No device damage, but loss of functionality
C	No device damage, but performance degradation
D	No device damage, no impact to functionality or performance

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

External pull-up resistor on both SDA1/SCL1 to V_CC1, pull-up resistor on SDA2/SCL2 to V_CC2