SFFS834 March   2024 DAC53204-Q1 , DAC63204-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the DACx3204-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Figure 4-1 shows the DACx3204-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the DACx3204-Q1 data sheet.

GUID-20210323-CA0I-BX30-QD5N-RG3CSFPR3QJN-low.svg Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • All the pin FMA analysis data is described based on the Figure 1-1.
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
FB3 1 Voltage output mode; OUT3 voltage value is always high B
Current output mode; no change in functionality or performance of OUT3 D
OUT3 2 Voltage output mode; OUT3 will always be stuck at zero in case OUT3 is configured as open drain pull down B
Voltage output mode; device can sustain damage over a period of time in case of OUT3 is configured in push-pull mode A
Current output mode; output compliance voltage violation and loss of performance C
OUT2 3 Voltage output mode; OUT2 will always be stuck at zero in case OUT2 is configured as open drain pull down B
Voltage output mode; device can sustain damage over a period of time in case of OUT2 is configured in push-pull mode A
Current output mode; output compliance voltage violation and loss of performance C
FB2 4 Voltage output mode; OUT2 voltage value is always high B
Current output mode; no change in functionality or performance of OUT2 D
GPIO/SDO 5 Loss of GPIO functionality and read back data will be corrupted B
SCL/SYNC 6 Loss of communication with the device B
A0/SDI 7 Loss of communication with the device B
SDA/SCLK 8 Loss of communication with the device B
FB1 9 Voltage output mode; OUT1 voltage value is always high B
Current output mode; no change in functionality or performance of OUT1 D
OUT1 10 Voltage output mode; OUT1 will always be stuck at zero in case OUT1 is configured as open drain pull down B
Voltage output mode; device can sustain damage over a period of time in case of OUT1 is configured in push-pull mode A
Current output mode; output compliance voltage violation and loss of performance C
OUT0 11 Voltage output mode; OUT0 will always be stuck at zero in case OUT0 is configured as open drain pull down B
Voltage output mode; device can sustain damage over a period of time in case of OUT0 is configured in push-pull mode A
Current output mode; output compliance voltage violation and loss of performance C
FB0 12 Voltage output mode; OUT0 voltage value is always high B
Current output mode; no change in functionality or performance of OUT0 D
CAP 13 Loss of functionality; device enters short circuit protection, power consumption increases B
AGND 14 No change in functionality or performance D
VDD 15 Complete loss of functionality; no device damage B
VREF 16 Loss of core DAC functionality B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
FB3 1 Voltage output mode; OUT3 voltage will be an incorrect value B
Current output mode; no change in functionality or performance of OUT3 D
OUT3 2 OUT3 output value is not available B
OUT2 3 OUT2 output value is not available B
FB2 4 Voltage output mode; OUT2 voltage will be an incorrect value B
Current output mode; no change in functionality or performance of OUT2 D
GPIO/SDO 5 Loss of GPIO functionality and read back data is not available B
SCL/SYNC 6 Loss of communication with the device B
A0/SDI 7 Loss of communication with the device B
SDA/SCLK 8 Loss of communication with the device B
FB1 9 Voltage output mode; OUT1 voltage will be an incorrect value B
Current output mode; no change in functionality or performance of OUT1 D
OUT1 10 OUT1 output value is not available B
OUT0 11 OUT0 output value is not available B
FB0 12 Voltage output mode; OUT0 voltage will be incorrect value B
Current output mode; no change in functionality or performance of OUT0 D
CAP 13 Open;circuited pin can cause damage to the low-voltage digital core and NVM supplied by the internal LDO A
AGND 14 Complete loss of functionality; no device damage B
VDD 15 Complete loss of functionality; no device damage B
VREF 16 External reference mode; loss of core DAC functionality B
Internal reference mode; no change in functionality or performance D
VDD as reference mode; no change in functionality or performance D
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effects Failure Effect Class
FB3 1 VREF Short to corner pin is not expected D
OUT3 Voltage output mode; this is an intended connection D
OUT3 Current output mode; no change in functionality or performance of OUT3 D
OUT3 2 FB3 Voltage output mode; this is an intended connection D
FB3 Current output mode; no change in functionality or performance of OUT3 D
OUT2 Device can sustain damage over a period of time A
OUT2 3 OUT3migh Device can sustain damage over a period of time A
FB2 Voltage output mode; this is an intended connection D
FB2 Current output mode; no change in functionality or performance of OUT2 D
FB2 4 OUT2 Voltage output mode; this is an intended connection D
OUT2 Current output mode; no change in functionality or performance of OUT2 D
GPIO/SDO Short to corner pin is not expected D
GPIO/SDO 5 FB2 Short to corner pin is not expected D
SCL/SYNC Loss of communication, GPI, and SDO functionality B
SCL/SYNC 6 GPIO/SDO Loss of communication, GPI, and SDO functionality B
A0/SDI Loss of communication with the device B
A0/SDI 7 SCL/SYNC Loss of communication with the device B
SDA/SCLK Loss of communication with the device B
SDA/SCLK 8 A0/SDI Loss of communication with the device B
FB1 Short to corner pin is not expected D
FB1 9 SDA/SCLK Short to corner pin is not expected D
OUT0 Voltage output mode; this is an intended connection D
OUT0 Current output mode; no change in functionality or performance of OUT1 D
OUT1 10 FB1 Voltage output mode; this is an intended connection D
FB1 Current output mode; no change in functionality or performance of OUT1 D
OUT0 Device can sustain damage over a period of time A
OUT0 11 OUT1 Device can sustain damage over a period of time A
FB0 Voltage output mode; this is an intended connection D
FB0 Current output mode; no change in functionality or performance of OUT0 D
FB0 12 OUT0 Voltage output mode; this is an intended connection D
OUT0 Current output mode; no change in functionality or performance of OUT0 D
CAP Short to corner pin is not expected D
CAP 13 FB0 Short to corner pin is not expected D
AGND Device enters short circuit protection; power consumption increases B
AGND 14 CAP Device enters short circuit protection; power consumption increases B
VDD Complete loss of functionality; no device damage B
VDD 15 AGND Complete loss of functionality; no device damage B
VREF External reference mode; loss of core DAC functionality B
VREF Internal reference mode; loss of core DAC functionality B
VREF VDD as reference mode; no change in functionality or performance D
VREF 16 VDD External reference mode; loss of core DAC functionality B
VDD Internal reference mode; loss of core DAC functionality B
VDD VDD as reference mode; no change in functionality or performance D
FB3 Short to corner pin is not expected D
Table 4-5 Pin FMA for Device Pins Short-Circuited to VDD
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
FB3 1 Voltage output mode; OUT3 voltage value is always low B
Current output mode; no change in functionality or performance of OUT3 D
OUT3 2 Voltage output mode - device can sustain damage over a period of time A
Current output mode; output compliance voltage violation and loss of performance C
OUT2 3 Voltage output mode; device can sustain damage over a period of time C
Current output mode; output compliance voltage violation and loss of performance A
FB2 4 Voltage output mode; OUT2 voltage value is always low \B
Current output mode; no change in functionality or performance of OUT2 D
GPIO/SDO 5 Loss of GPIO functionality and read back data will be corrupted B
SCL/SYNC 6 Loss of communication with the device B
A0/SDI 7 Loss of communication with the device B
SDA/SCLK 8 Loss of communication with the device B
FB1 9 Voltage output mode; OUT1 voltage value is always low B
Current output mode; no change in functionality or performance of OUT1 D
OUT1 10 Voltage output mode; device can sustain damage over a period of time A
Current output mode; output compliance voltage violation and loss of performance C
OUT0 11 Voltage output mode; device can sustain damage over a period of time A
Current output mode; output compliance voltage violation and loss of performance C
FB0 12 Voltage output mode; OUT0 voltage value is always low B
Current output mode; no change in functionality or performance of OUT0 D
CAP 13 Shorting to VDD pin can cause damage to the low-voltage digital core and NVM supplied by the internal LDO A
AGND 14 Complete loss of functionality; no device damage B
VDD 15 No change in functionality or performance D
VREF 16 External reference mode; loss of core DAC functionality B
Internal reference mode; loss of core DAC functionality B
VDD as reference mode; no change in functionality or performance D