SFFS959 August   2024 LMR51440-Q1 , LMR51450-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 LMR51440-Q1
    2. 2.2 LMR51450-Q1
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the LMR51440-Q1 and LMR51450-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

Figure 4-1 shows the LMR51440-Q1 and LMR51450-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the LMR51440-Q1 and LMR51450-Q1 data sheet.

LMR51440-Q1 and LMR51450-Q1 Pin DiagramFigure 4-1 Pin Diagram
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
SW1Damage to internal power FETs and other internal circuits.A
SW2Damage to internal power FETs and other internal circuits.A
SW3Damage to internal power FETs and other internal circuits.A
BOOT4VOUT = 0V, damage to internal circuits is possible.A
PG5Power function is poor.B
RT6Normal operation.D
FB7The regulator operates at maximum duty cycle. Output voltage rises to nearly the input voltage (VIN) level. Damage to customer load and output stage components is possible. No effect on device.B
AGND8Normal operation.D
EN9Loss of ENABLE functionality. Device remains in shutdown mode.B
VIN10Device does not operate. No output voltage is generated. Output capacitors discharge through the input short. A large current reversal can damage the device.A
VIN11Device does not operate. No output voltage is generated. Output capacitors discharge through the input short. A large current reversal can damage the device.A
VIN12Device does not operate. No output voltage is generated. Output capacitors discharge through the input short. A large current reversal can damage the device.A
PGND/DAP13Normal operation.D
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
SW1Loss of output voltage with both pins open.

Reduced device performance with one pin open.

B
SW2Loss of output voltage with both pins open.

Reduced device performance with one pin open.

B
SW3Loss of output voltage with both pins open.

Reduced device performance with one pin open.

B
BOOT4Loss of output voltage regulation; low or no output voltage.B
PG5Power function is poor.B
RT6Normal operation.D
FB7Loss of output voltage regulation. Output voltage can rise or fall outside of the intended regulation window.B
AGND8Loss of output voltage regulation. Damage to internal circuits is possible.A
EN9Loss of ENABLE functionality. Erratic operation; loss of regulation is probable.B

VIN

10Loss of output voltage with both pins open.

Device damage is possible with one pin open.

A
VIN11Loss of output voltage with both pins open.

Device damage is possible with one pin open.

A
VIN12Loss of output voltage with both pins open.

Device damage is possible with one pin open.

A
PGND/DAP13Loss of output voltage regulation. Damage to internal circuits is possible.A
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure EffectsFailure Effect Class
SW1SWNo effect.D
SW2SWNo effect.D
SW3BOOTVOUT = 0V, damage to internal circuits is possible.A
BOOT4PGPG pin ESD damage if BOOT pin voltage > 20V.A
PG5RTRT pin ESD damage if PG pin voltage > 5.5V.A
FB7AGNDThe regulator operates at maximum duty cycle. Output voltage rises to nearly the input voltage (VIN) level. Damage to customer load and output stage components is possible. No effect on device.B
AGND8ENLoss of ENABLE functionality. Device remains in shutdown mode.B
EN9VINNormal operation, no damage to device. Loss of ENABLE functionality.B
VIN10VINNo effect.D
VIN11VINNo effect.D
PGND/DAP13AnyOther pin is shorted to ground, see Table 4-2.Any
Table 4-5 Pin FMA for Device Pins Short-Circuited to Supply
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
SW1Damage to internal power FETs and other internal circuits.A
SW2Damage to internal power FETs and other internal circuits.A
SW3Damage to internal power FETs and other internal circuits.A
BOOT4VOUT = 0V. BOOT ESD clamp runs current to destruction.A
PG5Pin ESD Damage if supply voltage > 20V.A
RT6Pin ESD Damage if supply voltage > 5.5V.A
FB7If supply voltage exceeds 5.5V, damage occurs. VOUT = 0V.A
AGND8Damage to internal circuits or package is possible.A
EN9No damage to device. Loss of ENABLE functionality.B
VIN10No effect.D
VIN11No effect.D
VIN12No effect.D
PGND/DAP13Damage to internal circuits or package is possible.A