SLAA517F May 2012 – August 2021 MSP430F6720A , MSP430F6720A , MSP430F6721A , MSP430F6721A , MSP430F6723A , MSP430F6723A , MSP430F6724A , MSP430F6724A , MSP430F6725A , MSP430F6725A , MSP430F6726A , MSP430F6726A , MSP430F6730A , MSP430F6730A , MSP430F6731A , MSP430F6731A , MSP430F6733A , MSP430F6733A , MSP430F6734A , MSP430F6734A , MSP430F6735A , MSP430F6735A , MSP430F6736 , MSP430F6736 , MSP430F6736A , MSP430F6736A
The foreground process includes the initial setup of the hardware and software immediately after reset of the MSP430 MCU. Figure 4-1 shows the flowchart for this process.
The initialization routines involves the set up of the analog to digital converter, clock system, general purpose input/output (GPIO) port pins, timer, LCD and the USCI_A1 for universal Asynchronous receiver/transmitter (UART) functionality. A check is made to see if the main power is OFF and the device goes into LPM0. During normal operation, the background process notifies the foreground process through a status flag every time a frame of data is available for processing. This data frame consists of accumulation of energy for 1 second. This is equivalent to accumulation of 50 or 60 cycles of data samples synchronized to the incoming voltage signal. In addition, a sample counter keeps track of how many samples have been accumulated over the frame period. This count can vary as the software synchronizes with the incoming mains frequency. The data samples set consist of processed current, voltage, active and reactive energy. All values are accumulated in separate 48-bit registers to further process and obtain the RMS and mean values.