SLAA558A November   2012  – October 2018 MSP430F5212 , MSP430F5214 , MSP430F5217 , MSP430F5219 , MSP430F5222 , MSP430F5224 , MSP430F5229 , MSP430F5252 , MSP430F5253 , MSP430F5254 , MSP430F5255 , MSP430F5256 , MSP430F5257 , MSP430F5258 , MSP430F5259

 

  1.   Designing With MSP430F522x and MSP430F521x Devices
    1.     Trademarks
    2. 1 Split-Supply I/O Systems
    3. 2 DVIO Supplied I/Os
    4. 3 Secondary Digital Functions on DVIO Supplied I/Os
    5. 4 Split-Supply Power-Up or Power-Down Sequence
    6. 5 Reset and NMI Pin Functionality
    7. 6 XT1 and XT2 Oscillators in Bypass Mode
    8. 7 Bootloader (BSL)
      1. 7.1 BSL Entry Sequence for DVIO Supplied BSL Interface
      2. 7.2 BSL Exit Sequence for DVIO Supplied BSL Interface
    9. 8 Debugger Connections
      1. 8.1 JTAG Standard Interface
      2. 8.2 Spy-Bi-Wire Interface
      3. 8.3 Debugging Without DVIO
    10. 9 References
  2.   Revision History

8.2 Spy-Bi-Wire Interface

In addition to the standard JTAG interface, the F522x and F521x support the two wire Spy-Bi-Wire interface. Spy-Bi-Wire can be used to interface with the MSP430 development tools and device programmers. The Spy-Bi-Wire signals are powered by the DVCC supply domain and Table 3 lists the interface pin requirements.

Table 3. Spy-Bi-Wire Interface Pins

DEVICE SIGNAL DIRECTION FUNCTION
TEST/SBWTCK IN Spy-Bi-Wire clock input
RSTDVCC/SBWTDIO IN, OUT Spy-Bi-Wire data input/output
DVCC, AVCC Device power supply
DVIO I/O power supply
DVSS Ground supply

For further details on interfacing to development tools and device programmers, see the MSP430™ Hardware Tool User’s Guide.