SLAA828B March   2018  – August 2021 MSP430FR2000 , MSP430FR2032 , MSP430FR2033 , MSP430FR2100 , MSP430FR2110 , MSP430FR2111 , MSP430FR2310 , MSP430FR2311 , MSP430FR2422 , MSP430FR2433 , MSP430FR2512 , MSP430FR2522 , MSP430FR2532 , MSP430FR2533 , MSP430FR2632 , MSP430FR2633 , MSP430FR4131 , MSP430FR4132 , MSP430FR4133

 

  1.   Trademarks
  2. 1Introduction
  3. 2ADC Low-Power Sampling Software Design
    1. 2.1 System Clock Source Selection
    2. 2.2 ADC Clock Source Selection
    3. 2.3 Initialization of Unused GPIO Pins
  4. 3ADC Error Correction and Experimental Testing
    1. 3.1 Error Correction
    2. 3.2 Accuracy Test
  5. 4Time-Division Multiplexing of the ADC to Achieve Additional Channel Acquisition
  6. 5Summary
  7. 6References
  8. 7Revision History

2.3 Initialization of Unused GPIO Pins

Users can set corresponding bit in register PxREN to enable the on-chip pullup or pulldown resistor to avoid pin level be floating. Table 2-3 lists the power consumption comparison data for these two cases:

Table 2-3 GPIO Pin Initialization Configuration Power Consumption Comparison
Unused GPIO (1)UnconfiguredPulldown
Sampling frequency (Hz)11
Power consumption (µA)4001.2
(1) Experimental conditions:
  1. Device uses a free running MCLK at 1 MHz
  2. Test hardware is the MSP430FR4133 LaunchPad development kit
  3. XT1CLK as the clock source
  4. LPM3 low-power mode
  5. ADC sample hold time is 8 ADCCLK cycles
  6. ADC clock source is SMCLK