SLAA879A January   2019  – March 2021 SN74LVC1G08

 

  1.   Trademarks
  2. 1Block Diagram
  3. 2Logic and Translation Use Cases
    1. 2.1 Logic Use Cases
      1. 2.1.1 Combine Power Good Signals
      2. 2.1.2 Debounce Switches and Buttons
      3. 2.1.3 Fanout Signals to Multiple Receivers
      4. 2.1.4 Latching Alarm Circuit with Reset
      5. 2.1.5 Generate a Clock Signal from a Crystal Oscillator
      6. 2.1.6 Condition Digital Signals
    2. 2.2 Voltage Translation Use Cases
      1. 2.2.1 SPI Communication
      2. 2.2.2 GPIO Communication
      3. 2.2.3 I2C Communication
      4. 2.2.4 SD Card Communication
      5. 2.2.5 I2S Communication
  4. 3Recommended Logic and Translation Families for IP Cameras
    1. 3.1 AUP: Advanced Ultra-Low-Power CMOS Logic and Translation
    2. 3.2 AXC: Advanced eXtremely Low-Voltage CMOS Translation
    3. 3.3 LVC: Low-Voltage CMOS Logic and Translation
  5. 4Related Documentation
  6. 5Revision History

3.2 AXC: Advanced eXtremely Low-Voltage CMOS Translation

Key Features

  • Up and Down Translation Across 0.65 V to 3.6 V
  • Designed with glitch suppression circuitry to improve power sequencing performance
  • Maximum Quiescent Current (ICCA + ICCB) of 6 µA (85°C Maximum) and 14 µA (125°C Maximum)
  • Up to 500-Mbps support when translating from 1.8 to 3.3V
  • VCC Isolation Feature – If either VCC input is Below 100 mV, all I/Os outputs are disabled and become high impedance
  • Ioff supports partial-power-down mode operation
  • Operating Temperature: –40°C to +125°C
  • Packaging Options: DSBGA, SC70, SM8, SON, SOT-23, SOT, UQFN, US8, and X2SON

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