SLAA879A January   2019  β€“ March 2021 SN74LVC1G08

 

  1.   Trademarks
  2. 1Block Diagram
  3. 2Logic and Translation Use Cases
    1. 2.1 Logic Use Cases
      1. 2.1.1 Combine Power Good Signals
      2. 2.1.2 Debounce Switches and Buttons
      3. 2.1.3 Fanout Signals to Multiple Receivers
      4. 2.1.4 Latching Alarm Circuit with Reset
      5. 2.1.5 Generate a Clock Signal from a Crystal Oscillator
      6. 2.1.6 Condition Digital Signals
    2. 2.2 Voltage Translation Use Cases
      1. 2.2.1 SPI Communication
      2. 2.2.2 GPIO Communication
      3. 2.2.3 I2C Communication
      4. 2.2.4 SD Card Communication
      5. 2.2.5 I2S Communication
  4. 3Recommended Logic and Translation Families for IP Cameras
    1. 3.1 AUP: Advanced Ultra-Low-Power CMOS Logic and Translation
    2. 3.2 AXC: Advanced eXtremely Low-Voltage CMOS Translation
    3. 3.3 LVC: Low-Voltage CMOS Logic and Translation
  5. 4Related Documentation
  6. 5Revision History

2.1.2 Debounce Switches and Buttons

GUID-A5824919-6D76-4A18-8A15-A80F5AA0453E-low.gifFigure 2-2 Using Logic to Prevent Multiple Triggers of a CMOS Input Due to Switch Bounce
  • Prevents multiple triggers of CMOS inputs due to switch bounce
  • Works when the system controller is asleep
  • Works without a system controller
  • Reduces controller code complexity, no software debounce required
  • See more about this use case in the Logic Minute video Debounce a Switch
  • Find the right Schmitt-trigger buffer through the online parametric search tool