SLAA879A
January 2019 β March 2021
SN74LVC1G08
Trademarks
1
Block Diagram
2
Logic and Translation Use Cases
2.1
Logic Use Cases
2.1.1
Combine Power Good Signals
2.1.2
Debounce Switches and Buttons
2.1.3
Fanout Signals to Multiple Receivers
2.1.4
Latching Alarm Circuit with Reset
2.1.5
Generate a Clock Signal from a Crystal Oscillator
2.1.6
Condition Digital Signals
2.2
Voltage Translation Use Cases
2.2.1
SPI Communication
2.2.2
GPIO Communication
2.2.3
I2C Communication
2.2.4
SD Card Communication
2.2.5
I2S Communication
3
Recommended Logic and Translation Families for IP Cameras
3.1
AUP: Advanced Ultra-Low-Power CMOS Logic and Translation
3.2
AXC: Advanced eXtremely Low-Voltage CMOS Translation
3.3
LVC: Low-Voltage CMOS Logic and Translation
4
Related Documentation
5
Revision History
2.1.4
Latching Alarm Circuit with Reset
Figure 2-4
Using Logic to Monitor a Normally Closed (NC) Tamper Switch
Figure 2-5
Using Logic to Monitor a Normally Open (NO) Tamper Switch
Flags any tampering
Extremely low power
Works while the controller sleeps
Can be used without a controller
See more about this use case in the Logic Minute video
Using an S-R Latch in Alarm Circuitry
Find the right NOR or NAND gate through the
online parametric search tool