SLAAE71 December   2022 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507

 

  1.   Abstract
  2.   Trademarks
  3. 1Overview
  4. 2Low-Power Features in PMCU
    1. 2.1 Overview
      1. 2.1.1 Power Domains and Power Modes
      2. 2.1.2 Power Management (PMU)
        1. 2.1.2.1 Supply Supervisors
        2. 2.1.2.2 Peripheral Power Control
        3. 2.1.2.3 VBOOST for Analog Muxes
      3. 2.1.3 Clock Module (CKM)
        1. 2.1.3.1 Oscillators
        2. 2.1.3.2 Clocks
      4. 2.1.4 System Controller (SYSCTL)
        1. 2.1.4.1 Asynchronous Fast Clock Requests
        2. 2.1.4.2 Shutdown Mode Handling
  5. 3Low-Power Optimization
    1. 3.1 Low-Power Basics
    2. 3.2 MSPM0 Low-Power Feature Use
      1. 3.2.1 Low-Power Modes
      2. 3.2.2 System Clock and Peripheral Operation Frequency
      3. 3.2.3 I/O Configuration
      4. 3.2.4 Event Manager
      5. 3.2.5 Analog Peripheral Low-Power Features
      6. 3.2.6 Run Code From RAM
    3. 3.3 Software Coding Strategies
    4. 3.4 Hardware Design Strategies
  6. 4Power Consumption Measurement and Evaluation
    1. 4.1 Current Evaluation
    2. 4.2 Current Measurement
      1. 4.2.1 Current Measurement

2.1.4 System Controller (SYSCTL)

The system controller (SYSCTL) contains all control logic for managing the configuration and state of the PMU and CKM analog circuitry. The operating power mode selection is controlled by this module directly. SYSCTL also provides reset management, control over NRST and SWD pin mux, flash bank swap control, and flash ECC error handling. In this chapter we will focus on the low-power related features in SYSCTL instead of teaching users how to switch between different power modes.