SLAAEE0A November   2023  – July 2024 TAC5111 , TAC5112 , TAC5211 , TAC5212 , TAC5412-Q1 , TAD5112 , TAD5212 , TAD5212-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Output Configuration
    1. 2.1 Common-mode Generation
    2. 2.2 Output Load Range for Line Output And Headphone
    3. 2.3 Mixing and Bypass
  6. 3Available Settings for Hardware-Controlled Devices
  7. 4Summary
  8. 5References
  9. 6Revision History

Available Settings for Hardware-Controlled Devices

Several settings are available for hardware control devices using the MDx pin. The MD0 to MD6 pins allow the device to be controlled by either pullup or pulldown resistors. Dedicated tables in data sheet of pin controlled devices, for instance, show the configuration table for setting word length and AVDD supply voltage using MD1 and MD2. For non PDM mode, MP4 and MP5 can be used to set the analog input output configuration modes such as Differential, Single ended or Pseudo differential output, with Receiver or Headphone or Lineout load according to the table for Analog Output Configurations.Bits B0_P254_R41_D<2:0> are used to remap the different configurations based on the value of this register. For example, a zero value on this register can result the default functionality according to the tables mentioned previously. If remapped bits are made 1, then all these MD pins can be mapped to new functionality, For example a ONE written in bit D2 of register 41, can change the functionality based on the voltage applied to MD3 pin. In this case, when MD3 is 0, then IC is set for AVDD=1.8V operation and when MD3 is set to High, the IC is set for AVDD=3.3V operation.