SLAAEF6 September   2023 MSPM0L1105 , MSPM0L1106 , MSPM0L1306 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1PIR Design Description
    1. 1.1 PIR Sensor
    2. 1.2 PIR Signal Chain
      1. 1.2.1 Traditional Motion Detection Signal Chain Design
      2. 1.2.2 Capacitor-Free Signal Chain Design
  5. 2Hardware and Schematic
    1. 2.1 MSPM0L1306
    2. 2.2 MSPM0 PIR Boosterpack
      1. 2.2.1 Schematic
  6. 3Software
    1. 3.1 Software Architecture
    2. 3.2 Software Flow Chart
    3. 3.3 Data Processing
      1. 3.3.1 Digital Signal Conditioning
      2. 3.3.2 Low-Pass Filter for Temperature Drift
      3. 3.3.3 Spikes and Noise
      4. 3.3.4 Motion Detection Function
  7. 4Results
    1. 4.1 Power Profile and Current Consumption
    2. 4.2 Detection Performance
      1. 4.2.1 Distance: 5 meters (16.4 ft)
      2. 4.2.2 Distance: 9 meters (29.5 ft)
      3. 4.2.3 Distance: 10 meters (32.8 ft)
  8. 5Summary
  9. 6References

2.1 MSPM0L1306

The main MCU leveraged to enable this innovative PIR Motion Detector Design is the MSPM0L1306. The MSPM0L1306 is part of MSP's highly-integrated, ultra-low-power 32-bit MSPM0 MCU family based on the enhanced Arm® Cortex®-M0+ core platform operating at up to 32-MHz frequency. These cost-optimized MCUs offer high-performance analog peripheral integration, support extended temperature ranges from -40°C to 125°C, and operate with supply voltages ranging from 1.62 V to 3.6 V.

The MSPM0L134x and MSPM0L130x devices provide up to 64KB embedded flash program memory with up to 4KB SRAM. These MCUs incorporate a high-speed on-chip oscillator with an accuracy up to ±1.2%, eliminating the need for an external crystal. Additional features include a 3-channel DMA, 16- and 32-bit CRC accelerator, and a variety of high-performance analog peripherals such as one 12-bit 1.68-MSPS ADC with configurable internal voltage reference, one high-speed comparator with built-in reference DAC, two zero-drift zero-crossover operational amplifiers with programmable gain, one general-purpose amplifier, and an on-chip temperature sensor. These devices also offer intelligent digital peripherals such as four 16-bit general purpose timers, one windowed watchdog timer, and a variety of communication peripherals including two universal asynchronous receiver/transmitter (UARTs), one serial peripheral interface (SPI), and two inter-integrated circuits (I2Cs). These communication peripherals offer protocol support for LIN, IrDA, DALI, Manchester, Smart Card, SMBus, and PMBus.

  • Core
    • Arm 32-bit Cortex-M0+ CPU, frequency up to 32 MHz
  • Memories
    • Up to 64KB of flash
    • Up to 4KB of SRAM
  • High-performance analog peripherals
    • One 12-bit 1.68-Msps analog-to-digital converter (ADC)
    • Two zero-drift, zero-crossover chopper operational amplifiers (OPA)
      • Integrated programmable gain stage (1-32x)
    • One general-purpose amplifier (GPAMP)
    • One high-speed comparator (COMP) with 8-bit reference DAC
    • Programmable analog connections between ADC, OPAs, COMP, and DAC
  • Optimized low-power modes
    • RUN: 71 µA/MHz (CoreMark)
    • STANDBY: 1.0 µA with 32 kHz 16-bit timer running, SRAM/registers fully retained, and 32 MHz clock wakeup in 3.2 µs
    • SHUTDOWN: 61 nA with IO wakeup capability
  • Clock system
    • Internal 4- to 32-MHz oscillator with ±1.2% accuracy (SYSOSC)

MSPM0L134x and MSPM0L130x MCUs are supported by an extensive hardware and software ecosystem, including Launchpad Development kits, the MSPM0 Software Development Kit (SDK), which is available as a component of the TI Resource Explorer. MSPM0 MCUs are also supported by extensive online collateral, training with MSPM0 Academy, and online support through the TI E2E™ support forums.