SLAAEH8 October   2024 AFE781H1 , AFE782H1 , AFE881H1 , AFE882H1 , DAC8740H , DAC8741H , DAC8742H

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 The 4-20mA Loop
    2. 1.2 The HART Protocol
      1. 1.2.1 Adding HART to the 4-20mA Loop
      2. 1.2.2 HART FSK
  5. 2AFE881H1 HART Modem
    1. 2.1 AFE881H1 HART Transmitter
    2. 2.2 Detailed Schematic
      1. 2.2.1 Input Protection
      2. 2.2.2 Startup Circuit
      3. 2.2.3 Voltage-to-Current Stage
      4. 2.2.4 Voltage-to-Current Calculation
      5. 2.2.5 HART Signal Transmission
      6. 2.2.6 HART Input Protection
      7. 2.2.7 Current Consumption
      8. 2.2.8 HART Transmitter Board
      9. 2.2.9 HART Protocol Stack
  6. 3HART Testing and Registration
    1. 3.1  HART History and the FieldComm Group
    2. 3.2  HART Testing Overview
      1. 3.2.1 HART Protocol Specifications
      2. 3.2.2 HART Protocol Test Specifications
      3. 3.2.3 Remote Transmitter Device Testing
    3. 3.3  HART Test Equipment
    4. 3.4  HART Physical Layer Testing
      1. 3.4.1 FSK Sinusoid Test
      2. 3.4.2 Carrier Start and Stop Time Tests
      3. 3.4.3 Carrier Start and Stop Transient Tests
      4. 3.4.4 Output Noise During Silence
      5. 3.4.5 Analog Rate of Change Test
      6. 3.4.6 Receive Impedance Test
      7. 3.4.7 Noise Sensitivity Test
      8. 3.4.8 Carrier Detect Test
    5. 3.5  Data Link Layer Tests
      1. 3.5.1 Data Link Layer Test Specifications
      2. 3.5.2 Data Link Layer Test Logs
    6. 3.6  Universal Command Tests
    7. 3.7  Common-Practice Command Tests
    8. 3.8  Device Specific Command Tests
    9. 3.9  HART Protocol Test Submission
    10. 3.10 HART Registration
  7. 4Other TI HART Modem Designs
  8. 5Summary
  9. 6Acknowledgments
  10. 7References

3.4 HART Physical Layer Testing

The HART physical layer tests are described in HCF TEST-2. This document defines the requirements for testing HART devices for compliance with the HART FSK Physical Layer Specification. These tests verify many different parameters of the HART communication.

  • Verify the bit rate and signal frequencies for the HART transmission.
  • Verify that a carrier detect signal is sent within a minimum time after the start or stop of a HART transmission.
  • Measure the low-pass primary variable signal to check that a carrier detect start or stop does not disrupt the transmission of the primary variable.
  • Check that the output noise is below a maximum level when the HART is not transmitting.
  • Test the HART communications are still available when the current of the primary variable is cycling between the minimum of 4mA and maximum of 20mA (analog rate of change test).
  • Measure the HART device to verify high receive impedance over the frequency of the primary variable and HART frequency band.
  • Test HART transmission in the presence of in-band and out-of-band sinusoidal noise.
  • Check the carrier detect level to make sure a HART signal is detected when the signal is at the minimum amplitude, and not detected below a lower amplitude, while maintaining carrier detect timing.

As part of the physical layer of the HART protocol, these tests cover the timing and amplitude of the HART signal as generated by the AFE881H1 and with the surrounding circuitry. The following sections describe the HART physical layer tests and test setups.