SLAAEI4 August   2024 TAC5111-Q1 , TAC5212-Q1 , TAC5311-Q1 , TAC5312-Q1 , TAC5411-Q1 , TAC5412-Q1 , TAD5212-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Signal Processing Chain
  6. 3Distortion Limiter
    1. 3.1 Distortion Limiter Parameters
      1. 3.1.1 Threshold Maximum
      2. 3.1.2 Threshold Minimum
      3. 3.1.3 Inflection Point
      4. 3.1.4 Slope
      5. 3.1.5 Attack Rate
      6. 3.1.6 Release Rate
      7. 3.1.7 Hold Counter
    2. 3.2 Limiter Response
  7. 4Brown-Out Protection
    1. 4.1 Brown-Out Protection Parameters
      1. 4.1.1 Critical Level
      2. 4.1.2 Gain Level
      3. 4.1.3 Attack Rate
      4. 4.1.4 Release Rate
      5. 4.1.5 Hold Counter
    2. 4.2 Brown-Out Protection Response
  8. 5Thermal Foldback
    1. 5.1 Thermal Foldback Parameters
      1. 5.1.1 Temperature Threshold
      2. 5.1.2 Maximum Attenuation Threshold
      3. 5.1.3 Slope
      4. 5.1.4 Attack Coefficient
      5. 5.1.5 Release Coefficient
      6. 5.1.6 Hold Counter
        1. 5.1.6.1 Thermal Foldback Response
  9. 6Example
  10. 7Summary
  11. 8References

4.1.1 Critical Level

The critical level is a user-defined VBAT level parameter to initiate a gain increase or decrease to the output signal. This upper and lower threshold is controlled by the coefficients YRAM_VSUP_TH1 and YRAM_VSUP_TH2 respectively. Equation 8 shows how to compute the parameters from the desired voltage value. The threshold range is from 0.01V to 15V and can be programmed in steps of 1x10^-6V, where VS is the battery voltage supply critical level.

Equation 8. Y R A M _ V S U P _ T H ( 1 / 2 ) =   r o u n d ( V S × 2 11 )

Table 4-2 lists the registers corresponding to YRAM_VSUP_TH(1/2). The default value for threshold 1 (0x0000199A) corresponds to 3.2V and the default value for threshold 2 (0x00001666) corresponds to 2.8V.

Table 4-2 Programmable Coefficient Registers for Critical Levels
Coefficient Page Register Reset Value Description
YRAM_VSUP_TH1 0x1A 0x20 0x00 ASIOUT_BUF_VARS_BYT1[31:24]
0x1A 0x21 0x00 ASIOUT_BUF_VARS_BYT2[23:16]
0x1A 0x22 0x00 ASIOUT_BUF_VARS_BYT3[15:8]
0x1A 0x23 0x00 ASIOUT_BUF_VARS_BYT4[7:0]
YRAM_VSUP_TH2 0x1A 0x28 0x00 ASIOUT_BUF_VARS_BYT1[31:24]
0x1A 0x29 0x00 ASIOUT_BUF_VARS_BYT2[23:16]
0x1A 0x2A 0x00 ASIOUT_BUF_VARS_BYT3[15:8]
0x1A 0x2B 0x00 ASIOUT_BUF_VARS_BYT4[7:0]