MSPM0 LCD module support blinking mode. Some or all the segments are configurable to flash on and off (blinking). Blinking modes are applicable only in MUX modes 1 to 4.

For devices that support both full screen and individual segment blinking, the blinking happens automatically at a particular frequency. The blink frequency f_CLKBLK is configurable, but must be less than the frame frequency.

When using individual segment blinking, the blink memory controls whether a segment blinks. Software controls the segments by using two memory blocks, LCDMx and LCDBMx. As shown in Figure 4-8, these two memories are written from the VBUSP bus (system bus) and the contents are read using internal logic. The contents read from these two memory blocks are passed through the blinking override logic before the 64bit LCDVAL is passed to the IO buffers. The blink memory is used as a secondary display memory – the LCDMEMCTL.LCDDISP bit controls which memory is in use for the display.

There are three blinking modes supported on MSPM0 devices.

1. Blink Selected: The bits in the LCDBM memory determine the LCD outputs which participate in blinking. If a bit is set in LCDBM memory, the corresponding output is blinked, if the bit is 0, the corresponding bit is not blinked.
2. Blink all: All the segments participate in blinking.
3. Blink toggle: The state of a given segment alternates between values set in LCDM and LCDBM memory bits.

Figure 4-8 LCD Blinking and Dual Display Memory