SLASEJ5B October 2017 – January 2020
PRODUCTION DATA.
The device provides a cyclic redundancy check to verify register values in the shift registers. In readback mode, the device provides 6 bits of the CRC remainder. The MCU can read back the CRC remainder and check if the remainder is correct to determine whether the communication loop between MCU and device is good. Shift-Register Communication-Fault Detection gives a detailed description of the CRC check.