SLAU472C February 2013 – November 2023 TAS2505 , TAS2505-Q1
There are two recommended power sequence possible for TAS2505:
The first power on sequence is useful if the end system uses separate analog and digital supplies. This is useful to improve the efficiency of the digital rails by using a DC/DC converter, while keeping the analog supplies clean by using a low-dropout regulator(s) (LDO). While it is recommended to separate analog and digital supplies, if all the 1.8 V supplies (analog and digital) must be tied together, the second power sequence can be utilized and this sequence can adopt in case of using the internal LDO.
In any of the power sequence cases, the input clocks BCLK, WCLK, and MCLK (if used) must be enabled before writing into the device registers for initialization. If these clocks are stopped at any time, at least the Class-D speaker output must be disabled (Page 1 Register 45 Bit D1) or muted (Page 1 Register 48 bits D6-D4) to prevent audio artifacts at the speaker.