SLAU647O July   2015  – April 2020

 

  1.   MSP Debuggers
    1.     Trademarks
    2. 1 Introduction
      1. 1.1 Related Documentation From Texas Instruments
      2. 1.2 Terms and Abbreviations
      3. 1.3 If You Need Assistance
    3. 2 MSP Debug Probe Overview
      1. 2.1 Known Limitations
    4. 3 Hardware Identification
      1. 3.1 How to Determine If Your Hardware is Based on eZ-FET or eZ-FET Lite
      2. 3.2 How to Determine If Your Hardware is Based on eZ430
      3. 3.3 Signal Connections for In-System Programming and Debugging
      4. 3.4 Using the Power Supply Feature of the eZ-FET and eZ-FET Lite
      5. 3.5 Using the Power Supply Feature of the MSP-FET430UIF and MSP-FET
    5. 4 Hardware Installation
      1. 4.1 MSP-FET430PIF
      2. 4.2 MSP-FET430UIF, MSP-FET, eZ-FET, and eZ-FET Lite
      3. 4.3 eZ430-Based Experimenter Boards and LaunchPad Kits
      4. 4.4 Hardware Installation Using the MSP Flasher
      5. 4.5 Hardware Installation Using CCS Cloud
    6. 5 Debug Probes Hardware and Software
      1. 5.1  MSPDebugStack
      2. 5.2  Ultra-Low-Power (ULP) Debug Support
      3. 5.3  EnergyTrace™ Technology
      4. 5.4  Unlimited Software Breakpoints in Flash, FRAM, and RAM
      5. 5.5  JTAG Access Protection (Fuse Blow)
      6. 5.6  MSP-FET Stand-Alone Debug Probe
        1. 5.6.1 General Features
        2. 5.6.2 Backchannel UART
          1. 5.6.2.1 UART Backchannel Activation Commands
        3. 5.6.3 Target BSL Connection and BSL-Scripter Support
        4. 5.6.4 LED Signals
        5. 5.6.5 Hardware
          1. 5.6.5.1 JTAG Target Connector
          2. 5.6.5.2 MSP-FET Pin States After Power Up
          3. 5.6.5.3 MSP-FET HID Cold Boot
          4. 5.6.5.4 Schematics
            1. 5.6.5.4.1 MSP-FET Rev 2.5 Schematics
            2. 5.6.5.4.2 MSP-FET Rev 1.2 Schematics
        6. 5.6.6 Specifications
          1. 5.6.6.1 Hardware
          2. 5.6.6.2 MSP430 MCUs
          3. 5.6.6.3 SimpleLink MSP432 MCUs
      7. 5.7  MSP-FET430UIF Stand-Alone Debugger
        1. 5.7.1 General Features
        2. 5.7.2 LED Signals
        3. 5.7.3 Hardware
          1. 5.7.3.1 JTAG Target Connector
          2. 5.7.3.2 Pin States After Power Up
          3. 5.7.3.3 Schematics
      8. 5.8  eZ-FET and eZ-FET Lite Onboard Emulation
        1. 5.8.1 General Features
        2. 5.8.2 Backchannel UART
          1. 5.8.2.1 eZ-FET and eZ-FET Lite UART Backchannel Activation Commands
        3. 5.8.3 LED Signals
        4. 5.8.4 Hardware
          1. 5.8.4.1 JTAG Target Connector
          2. 5.8.4.2 Connecting MSP-FET to LaunchPad Development Kit
          3. 5.8.4.3 Pin States After Power Up
          4. 5.8.4.4 Schematics
            1. 5.8.4.4.1 eZ-FET Rev 1.2 Schematics
            2. 5.8.4.4.2 eZ-FET Lite Schematics
            3. 5.8.4.4.3 eZ-FET Rev 1.4 Schematic
            4. 5.8.4.4.4 eZ-FET Rev 2.0 ET Schematics
      9. 5.9  eZ430 Onboard Emulation
        1. 5.9.1 General Features
        2. 5.9.2 Backchannel UART
        3. 5.9.3 Hardware
          1. 5.9.3.1 JTAG Target Connector
          2. 5.9.3.2 Pin States After Power Up
          3. 5.9.3.3 Schematics
      10. 5.10 MSP-FET430PIF
        1. 5.10.1 General Features
        2. 5.10.2 Schematics
  2.   Revision History

5.6.6.2 MSP430 MCUs

Table 10 lists the specifications for the MSP-FET interface to MSP430 microcontrollers.

Table 10. JTAG and Spy-Bi-Wire Interface Specifications

JTAG and Spy-Bi-Wire Interface, Electrical
Power supply USB powered,
200 mA (max)
Target output voltage VCC_TOOL 1.8 V to 3.6 V Selectable in 0.1-V steps. VCC_TOOL available from JTAG pin 2.
Target output current 100 mA (max) Current supplied through JTAG pin 2
Target output overcurrent detection level 160 mA (max)
JTAG signal overcurrent detection level 30 mA (max) Total current supplied through JTAG pins 1, 3, 5, 7, 8, 10, 11, 12, 13, 14
External target supply Supported
(1.8 V to 3.6 V)		 Connect external target voltage VCC_TARGET to JTAG pin 4. JTAG and SBW signals are regulated to external target voltage ±100 mV.
Fuse blow Supported For devices with poly-fuse
JTAG and Spy-Bi-Wire Interface, Timing
JTAG clock speed 8 MHz (max) Protocol speed selectable by software
SBW clock speed 8 MHz (max) Protocol speed selectable by software. System limitations due to external RC components on reset pin might apply.
JTAG and Spy-Bi-Wire Interface, Speed
Flash write speed (JTAG) Up to 20 kB/s
Flash write speed (SWB) Up to 7 kB/s
FRAM write speed (JTAG) Up to 50 kB/s
FRAM write speed (SWB) Up to 14 kB/s