SLAU647O July 2015 – April 2020
Table 19 describes the electrical state of every JTAG pin after debug probe power up.
Signal Name | After Power-Up | When Spy-Bi-Wire Protocol is Active |
---|---|---|
VCC | Target VCC | Target VCC |
RST | In and Out, SBWTDIO | In and Out, SBWTDIO |
TST | Out, SBWTCK | Out, SBWTCK |
TXD | In, Target UART TXD output | In, Target UART TXD output |
RXD | Out, Target UART RXD input | Out, Target UART RXD input |